blob: 58085dc0a36b8f5eec3fe276db78f23eaa3a5dd1 [file] [log] [blame]
Masahiro Yamadaddd960e2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass53b5bf32016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glass77d2f7f2016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glasscc4288e2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse00f76c2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warren49626ea2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren15bcc622015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Stephen Warren140a9ea2016-09-13 10:46:00 -060025 select CLK
Tom Warren56079ec2015-07-17 08:12:51 -070026 select DM
Simon Glass96350f72015-11-29 13:18:01 -070027 select DM_ETH
Tom Warren56079ec2015-07-17 08:12:51 -070028 select DM_GPIO
Stephen Warren15bcc622015-11-23 10:32:01 -070029 select DM_I2C
Simon Glassf77f5e92015-10-18 21:17:16 -060030 select DM_KEYBOARD
Tom Warren6a474db2016-09-13 10:45:48 -060031 select DM_MMC
Simon Glass91c08af2016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren140a9ea2016-09-13 10:46:00 -060033 select DM_RESET
Stephen Warren15bcc622015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
Stephen Warren140a9ea2016-09-13 10:46:00 -060037 select MISC
Stephen Warren15bcc622015-11-23 10:32:01 -070038 select OF_CONTROL
Simon Glassd6ef8a62016-02-16 18:09:19 -070039 select VIDCONSOLE_AS_LCD if DM_VIDEO
Simon Glassa5d67542017-01-23 13:31:20 -070040 select BOARD_EARLY_INIT_F
Daniel Thompson221a9492017-05-19 17:26:58 +010041 imply CRC32_VERIFY
Stephen Warren15bcc622015-11-23 10:32:01 -070042
Stephen Warren140a9ea2016-09-13 10:46:00 -060043config TEGRA_NO_BPMP
44 bool "Tegra common options for SoCs without BPMP"
45 select TEGRA_CAR
46 select TEGRA_CAR_CLOCK
47 select TEGRA_CAR_RESET
48
Stephen Warren15bcc622015-11-23 10:32:01 -070049config TEGRA_ARMV7_COMMON
50 bool "Tegra 32-bit common options"
51 select CPU_V7
52 select SPL
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080053 select SPL_BOARD_INIT if SPL
Stephen Warren15bcc622015-11-23 10:32:01 -070054 select SUPPORT_SPL
55 select TEGRA_COMMON
Stephen Warren601800b2016-05-12 12:07:41 -060056 select TEGRA_GPIO
Stephen Warren140a9ea2016-09-13 10:46:00 -060057 select TEGRA_NO_BPMP
Stephen Warren15bcc622015-11-23 10:32:01 -070058
59config TEGRA_ARMV8_COMMON
60 bool "Tegra 64-bit common options"
61 select ARM64
62 select TEGRA_COMMON
Simon Glass2be29652017-07-23 21:19:39 -060063 imply ENV_IS_IN_MMC
Tom Warren56079ec2015-07-17 08:12:51 -070064
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090065choice
66 prompt "Tegra SoC select"
Joe Hershbergera26cd042015-05-12 14:46:23 -050067 optional
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090068
69config TEGRA20
70 bool "Tegra20 family"
Tom Rini8dda2e22017-03-07 07:13:42 -050071 select ARM_ERRATA_716044
72 select ARM_ERRATA_742230
73 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -070074 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090075
76config TEGRA30
77 bool "Tegra30 family"
Tom Rini8dda2e22017-03-07 07:13:42 -050078 select ARM_ERRATA_743622
79 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -070080 select TEGRA_ARMV7_COMMON
Simon Glass2be29652017-07-23 21:19:39 -060081 imply ENV_IS_IN_MMC
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090082
83config TEGRA114
84 bool "Tegra114 family"
Tom Warren56079ec2015-07-17 08:12:51 -070085 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090086
87config TEGRA124
88 bool "Tegra124 family"
Tom Warren56079ec2015-07-17 08:12:51 -070089 select TEGRA_ARMV7_COMMON
Simon Glass2be29652017-07-23 21:19:39 -060090 imply ENV_IS_IN_MMC
Simon Glass66de3ee2017-07-25 08:29:58 -060091 imply REGMAP
92 imply SYSCON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090093
Tom Warren7aaa5a62015-03-04 16:36:00 -070094config TEGRA210
95 bool "Tegra210 family"
Stephen Warren601800b2016-05-12 12:07:41 -060096 select TEGRA_GPIO
Stephen Warren15bcc622015-11-23 10:32:01 -070097 select TEGRA_ARMV8_COMMON
Stephen Warren140a9ea2016-09-13 10:46:00 -060098 select TEGRA_NO_BPMP
Tom Warren7aaa5a62015-03-04 16:36:00 -070099
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600100config TEGRA186
101 bool "Tegra186 family"
Stephen Warren0f67e232016-06-17 09:43:57 -0600102 select DM_MAILBOX
Stephen Warren73dd5c42016-08-08 09:41:34 -0600103 select TEGRA186_BPMP
Stephen Warrend9fd7002016-08-08 11:28:24 -0600104 select TEGRA186_CLOCK
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600105 select TEGRA186_GPIO
Stephen Warren4dd99d12016-08-08 11:28:25 -0600106 select TEGRA186_RESET
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600107 select TEGRA_ARMV8_COMMON
Stephen Warren0f67e232016-06-17 09:43:57 -0600108 select TEGRA_HSP
Stephen Warren49626ea2016-07-18 12:17:11 -0600109 select TEGRA_IVC
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600110
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900111endchoice
112
Stephen Warrendd8204d2016-01-26 10:59:42 -0700113config TEGRA_DISCONNECT_UDC_ON_BOOT
114 bool "Disconnect USB device mode controller on boot"
115 default y
116 help
117 When loading U-Boot into RAM over USB protocols using tools such as
118 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
119 mode controller is initialized and enumerated by the host PC running
120 the tool. Unfortunately, these tools do not shut down the USB
121 controller before executing the downloaded code, and so the host PC
122 does not "de-enumerate" the USB device. This option shuts down the
123 USB controller when U-Boot boots to avoid leaving a stale USB device
124 present.
125
Simon Glassb724bd72015-02-11 16:32:59 -0700126config SYS_MALLOC_F_LEN
127 default 0x1800
128
Masahiro Yamada09f455d2015-02-20 17:04:04 +0900129source "arch/arm/mach-tegra/tegra20/Kconfig"
130source "arch/arm/mach-tegra/tegra30/Kconfig"
131source "arch/arm/mach-tegra/tegra114/Kconfig"
132source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warren7aaa5a62015-03-04 16:36:00 -0700133source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600134source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900135
Simon Glass42e6f852017-05-17 03:25:11 -0600136config CMD_ENTERRCM
137 bool "Enable 'enterrcm' command"
138 default y
139 help
140 Tegra's boot ROM supports a mode whereby code may be downloaded and
141 flash-programmed over a USB connection. On dev boards, this is
142 typically entered by holding down a "force recovery" button and
143 resetting the CPU. However, not all boards have such a button (one
144 example is the Compulab Trimslice), so a method to enter RCM from
145 software is useful.
146
147 Even on boards other than Trimslice, controlling this over a UART
148 may be useful, e.g. to allow simple remote control without the need
149 for mechanical button actuators, or hooking up relays/... to the
150 button.
151
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900152endif