blob: 4ece2b6c9fe34385b5d3dd9b4452f610cf16e708 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000026
27/* TODO: Can we move these into arch/ headers? */
28#ifdef CONFIG_8xx
29#include <mpc8xx.h>
30#endif
31#ifdef CONFIG_5xx
32#include <mpc5xx.h>
33#endif
34#ifdef CONFIG_MPC5xxx
35#include <mpc5xxx.h>
36#endif
Gabriel Huaua76df702014-07-26 11:35:43 -070037#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
38#include <asm/mp.h>
39#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000040
Simon Glassa733b062013-04-26 02:53:43 +000041#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000042#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000043#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020044#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070045#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000047#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/io.h>
49#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000050#ifdef CONFIG_X86
51#include <asm/init_helpers.h>
52#include <asm/relocate.h>
53#endif
Simon Glassa733b062013-04-26 02:53:43 +000054#ifdef CONFIG_SANDBOX
55#include <asm/state.h>
56#endif
Simon Glassab7cd622014-07-23 06:55:04 -060057#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000058#include <linux/compiler.h>
59
60/*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66#undef XTRN_DECLARE_GLOBAL_DATA_PTR
67#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69#else
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
73/*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79/************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020084__weak void coloured_LED_init(void) {}
85__weak void red_led_on(void) {}
86__weak void red_led_off(void) {}
87__weak void green_led_on(void) {}
88__weak void green_led_off(void) {}
89__weak void yellow_led_on(void) {}
90__weak void yellow_led_off(void) {}
91__weak void blue_led_on(void) {}
92__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000093
94/*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105/*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800109#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000110static int init_func_watchdog_init(void)
111{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800112# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH))
115 hw_watchdog_init();
116# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121}
122
123int init_func_watchdog_reset(void)
124{
125 WATCHDOG_RESET();
126
127 return 0;
128}
129#endif /* CONFIG_WATCHDOG */
130
131void __board_add_ram_info(int use_default)
132{
133 /* please define platform specific board_add_ram_info() */
134}
135
136void board_add_ram_info(int)
137 __attribute__ ((weak, alias("__board_add_ram_info")));
138
Simon Glass1938f4a2013-03-11 06:49:53 +0000139static int init_baud_rate(void)
140{
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 return 0;
143}
144
145static int display_text_info(void)
146{
Simon Glassa733b062013-04-26 02:53:43 +0000147#ifndef CONFIG_SANDBOX
Simon Glass1938f4a2013-03-11 06:49:53 +0000148 ulong bss_start, bss_end;
149
Simon Glass632efa72013-03-11 07:06:48 +0000150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100152
Simon Glass1938f4a2013-03-11 06:49:53 +0000153 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800154#ifdef CONFIG_SYS_TEXT_BASE
Simon Glass1938f4a2013-03-11 06:49:53 +0000155 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800156#else
157 CONFIG_SYS_MONITOR_BASE, bss_start, bss_end);
158#endif
Simon Glassa733b062013-04-26 02:53:43 +0000159#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000160
161#ifdef CONFIG_MODEM_SUPPORT
162 debug("Modem Support enabled\n");
163#endif
164#ifdef CONFIG_USE_IRQ
165 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
166 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
167#endif
168
169 return 0;
170}
171
172static int announce_dram_init(void)
173{
174 puts("DRAM: ");
175 return 0;
176}
177
Paul Burton3da7e5a2014-04-07 10:11:20 +0100178#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000179static int init_func_ram(void)
180{
181#ifdef CONFIG_BOARD_TYPES
182 int board_type = gd->board_type;
183#else
184 int board_type = 0; /* use dummy arg */
185#endif
186
187 gd->ram_size = initdram(board_type);
188
189 if (gd->ram_size > 0)
190 return 0;
191
192 puts("*** failed ***\n");
193 return 1;
194}
195#endif
196
Simon Glass1938f4a2013-03-11 06:49:53 +0000197static int show_dram_config(void)
198{
York Sunfa39ffe2014-05-02 17:28:05 -0700199 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000200
201#ifdef CONFIG_NR_DRAM_BANKS
202 int i;
203
204 debug("\nRAM Configuration:\n");
205 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
206 size += gd->bd->bi_dram[i].size;
207 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
208#ifdef DEBUG
209 print_size(gd->bd->bi_dram[i].size, "\n");
210#endif
211 }
212 debug("\nDRAM: ");
213#else
214 size = gd->ram_size;
215#endif
216
Simon Glasse4fef6c2013-03-11 14:30:42 +0000217 print_size(size, "");
218 board_add_ram_info(0);
219 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000220
221 return 0;
222}
223
224void __dram_init_banksize(void)
225{
226#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
227 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
228 gd->bd->bi_dram[0].size = get_effective_memsize();
229#endif
230}
231
232void dram_init_banksize(void)
233 __attribute__((weak, alias("__dram_init_banksize")));
234
Heiko Schocherea818db2013-01-29 08:53:15 +0100235#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000236static int init_func_i2c(void)
237{
238 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200239#ifdef CONFIG_SYS_I2C
240 i2c_init_all();
241#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200243#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000244 puts("ready\n");
245 return 0;
246}
247#endif
248
249#if defined(CONFIG_HARD_SPI)
250static int init_func_spi(void)
251{
252 puts("SPI: ");
253 spi_init();
254 puts("ready\n");
255 return 0;
256}
257#endif
258
259__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000260static int zero_global_data(void)
261{
262 memset((void *)gd, '\0', sizeof(gd_t));
263
264 return 0;
265}
266
267static int setup_mon_len(void)
268{
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100269#ifdef __ARM__
270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000271#elif defined(CONFIG_SANDBOX)
272 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800273#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000275#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000278#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000279 return 0;
280}
281
282__weak int arch_cpu_init(void)
283{
284 return 0;
285}
286
Simon Glassf828bf22013-04-20 08:42:41 +0000287#ifdef CONFIG_OF_HOSTFILE
288
Simon Glassf828bf22013-04-20 08:42:41 +0000289static int read_fdt_from_file(void)
290{
291 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700292 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000293 void *blob;
Simon Glass95fac6a2014-02-27 13:25:58 -0700294 ssize_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000295 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700296 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000297
298 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
299 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700300 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000301 if (!err)
302 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700303 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
304 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000305 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700306
307 size = os_get_filesize(fname);
308 if (size < 0) {
309 printf("Failed to file FDT file '%s'\n", fname);
310 return -ENOENT;
311 }
312 fd = os_open(fname, OS_O_RDONLY);
313 if (fd < 0) {
314 printf("Failed to open FDT file '%s'\n", fname);
315 return -EACCES;
316 }
317 if (os_read(fd, blob, size) != size) {
318 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000319 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700320 }
321 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000322
323done:
324 gd->fdt_blob = blob;
325
326 return 0;
327}
328#endif
329
Simon Glassa733b062013-04-26 02:53:43 +0000330#ifdef CONFIG_SANDBOX
331static int setup_ram_buf(void)
332{
Simon Glass5c2859c2013-11-10 10:27:03 -0700333 struct sandbox_state *state = state_get_current();
334
335 gd->arch.ram_buf = state->ram_buf;
336 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000337
338 return 0;
339}
340#endif
341
Simon Glass1938f4a2013-03-11 06:49:53 +0000342static int setup_fdt(void)
343{
344#ifdef CONFIG_OF_EMBED
345 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900346 gd->fdt_blob = __dtb_dt_begin;
Simon Glass1938f4a2013-03-11 06:49:53 +0000347#elif defined CONFIG_OF_SEPARATE
348 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000349 gd->fdt_blob = (ulong *)&_end;
Simon Glassf828bf22013-04-20 08:42:41 +0000350#elif defined(CONFIG_OF_HOSTFILE)
351 if (read_fdt_from_file()) {
352 puts("Failed to read control FDT\n");
353 return -1;
354 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000355#endif
356 /* Allow the early environment to override the fdt address */
357 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
358 (uintptr_t)gd->fdt_blob);
359 return 0;
360}
361
362/* Get the top of usable RAM */
363__weak ulong board_get_usable_ram_top(ulong total_size)
364{
365 return gd->ram_top;
366}
367
368static int setup_dest_addr(void)
369{
370 debug("Monitor len: %08lX\n", gd->mon_len);
371 /*
372 * Ram is setup, size stored in gd !!
373 */
374 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
375#if defined(CONFIG_SYS_MEM_TOP_HIDE)
376 /*
377 * Subtract specified amount of memory to hide so that it won't
378 * get "touched" at all by U-Boot. By fixing up gd->ram_size
379 * the Linux kernel should now get passed the now "corrected"
380 * memory size and won't touch it either. This should work
381 * for arch/ppc and arch/powerpc. Only Linux board ports in
382 * arch/powerpc with bootwrapper support, that recalculate the
383 * memory size from the SDRAM controller setup will have to
384 * get fixed.
385 */
386 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
387#endif
388#ifdef CONFIG_SYS_SDRAM_BASE
389 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
390#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000391 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000392 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000393 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000394 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huaua76df702014-07-26 11:35:43 -0700395#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000396 /*
397 * We need to make sure the location we intend to put secondary core
398 * boot code is reserved and not used by any part of u-boot
399 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000400 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
401 gd->relocaddr = determine_mp_bootpg(NULL);
402 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000403 }
404#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000405 return 0;
406}
407
408#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
409static int reserve_logbuffer(void)
410{
411 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000412 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000413 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000414 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000415 return 0;
416}
417#endif
418
419#ifdef CONFIG_PRAM
420/* reserve protected RAM */
421static int reserve_pram(void)
422{
423 ulong reg;
424
425 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000426 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000427 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000428 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000429 return 0;
430}
431#endif /* CONFIG_PRAM */
432
433/* Round memory pointer down to next 4 kB limit */
434static int reserve_round_4k(void)
435{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000436 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000437 return 0;
438}
439
440#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
441 defined(CONFIG_ARM)
442static int reserve_mmu(void)
443{
444 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800445 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000446 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000447
448 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000449 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000450
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000451 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000452 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
453 gd->arch.tlb_addr + gd->arch.tlb_size);
454 return 0;
455}
456#endif
457
458#ifdef CONFIG_LCD
459static int reserve_lcd(void)
460{
461#ifdef CONFIG_FB_ADDR
462 gd->fb_base = CONFIG_FB_ADDR;
463#else
464 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000465 gd->relocaddr = lcd_setmem(gd->relocaddr);
466 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000467#endif /* CONFIG_FB_ADDR */
468 return 0;
469}
470#endif /* CONFIG_LCD */
471
Simon Glass71c52db2013-06-11 11:14:42 -0700472static int reserve_trace(void)
473{
474#ifdef CONFIG_TRACE
475 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
476 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
477 debug("Reserving %dk for trace data at: %08lx\n",
478 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
479#endif
480
481 return 0;
482}
483
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800484#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
485 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
486 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000487static int reserve_video(void)
488{
489 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000490 gd->relocaddr = video_setmem(gd->relocaddr);
491 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000492
493 return 0;
494}
495#endif
496
Simon Glass1938f4a2013-03-11 06:49:53 +0000497static int reserve_uboot(void)
498{
499 /*
500 * reserve memory for U-Boot code, data & bss
501 * round down to next 4 kB limit
502 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000503 gd->relocaddr -= gd->mon_len;
504 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000505#ifdef CONFIG_E500
506 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000507 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000508#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000509
510 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000511 gd->relocaddr);
512
513 gd->start_addr_sp = gd->relocaddr;
514
Simon Glass1938f4a2013-03-11 06:49:53 +0000515 return 0;
516}
517
Simon Glass8cae8a62013-03-05 14:39:45 +0000518#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000519/* reserve memory for malloc() area */
520static int reserve_malloc(void)
521{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000522 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000523 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000524 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000525 return 0;
526}
527
528/* (permanently) allocate a Board Info struct */
529static int reserve_board(void)
530{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800531 if (!gd->bd) {
532 gd->start_addr_sp -= sizeof(bd_t);
533 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
534 memset(gd->bd, '\0', sizeof(bd_t));
535 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
536 sizeof(bd_t), gd->start_addr_sp);
537 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000538 return 0;
539}
Simon Glass8cae8a62013-03-05 14:39:45 +0000540#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000541
542static int setup_machine(void)
543{
544#ifdef CONFIG_MACH_TYPE
545 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
546#endif
547 return 0;
548}
549
550static int reserve_global_data(void)
551{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000552 gd->start_addr_sp -= sizeof(gd_t);
553 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000554 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000555 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000556 return 0;
557}
558
559static int reserve_fdt(void)
560{
561 /*
562 * If the device tree is sitting immediate above our image then we
563 * must relocate it. If it is embedded in the data section, then it
564 * will be relocated with other data.
565 */
566 if (gd->fdt_blob) {
567 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
568
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000569 gd->start_addr_sp -= gd->fdt_size;
570 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000571 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000572 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000573 }
574
575 return 0;
576}
577
578static int reserve_stacks(void)
579{
Simon Glass8cae8a62013-03-05 14:39:45 +0000580#ifdef CONFIG_SPL_BUILD
581# ifdef CONFIG_ARM
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000582 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
583 gd->irq_sp = gd->start_addr_sp;
Simon Glass8cae8a62013-03-05 14:39:45 +0000584# endif
585#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000586# ifdef CONFIG_PPC
587 ulong *s;
588# endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000589
Simon Glass1938f4a2013-03-11 06:49:53 +0000590 /* setup stack pointer for exceptions */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000591 gd->start_addr_sp -= 16;
592 gd->start_addr_sp &= ~0xf;
593 gd->irq_sp = gd->start_addr_sp;
Simon Glass1938f4a2013-03-11 06:49:53 +0000594
595 /*
596 * Handle architecture-specific things here
597 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
598 * to handle this and put in arch/xxx/lib/stack.c
599 */
David Fengcce6be72013-12-14 11:47:36 +0800600# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000601# ifdef CONFIG_USE_IRQ
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000602 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
Simon Glass1938f4a2013-03-11 06:49:53 +0000603 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000604 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000605
606 /* 8-byte alignment for ARM ABI compliance */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000607 gd->start_addr_sp &= ~0x07;
Simon Glass1938f4a2013-03-11 06:49:53 +0000608# endif
609 /* leave 3 words for abort-stack, plus 1 for alignment */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000610 gd->start_addr_sp -= 16;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000611# elif defined(CONFIG_PPC)
612 /* Clear initial stack frame */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000613 s = (ulong *) gd->start_addr_sp;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000614 *s = 0; /* Terminate back chain */
615 *++s = 0; /* NULL return address */
Simon Glass8cae8a62013-03-05 14:39:45 +0000616# endif /* Architecture specific code */
Simon Glass1938f4a2013-03-11 06:49:53 +0000617
618 return 0;
Simon Glass8cae8a62013-03-05 14:39:45 +0000619#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000620}
621
622static int display_new_sp(void)
623{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000624 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000625
626 return 0;
627}
628
Simon Glasse4fef6c2013-03-11 14:30:42 +0000629#ifdef CONFIG_PPC
630static int setup_board_part1(void)
631{
632 bd_t *bd = gd->bd;
633
634 /*
635 * Save local variables to board info struct
636 */
637
638 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
639 bd->bi_memsize = gd->ram_size; /* size in bytes */
640
641#ifdef CONFIG_SYS_SRAM_BASE
642 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
643 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
644#endif
645
Masahiro Yamada58dac322014-03-05 17:40:10 +0900646#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000647 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
648 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
649#endif
650#if defined(CONFIG_MPC5xxx)
651 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
652#endif
653#if defined(CONFIG_MPC83xx)
654 bd->bi_immrbar = CONFIG_SYS_IMMR;
655#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000656
657 return 0;
658}
659
660static int setup_board_part2(void)
661{
662 bd_t *bd = gd->bd;
663
664 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
665 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
666#if defined(CONFIG_CPM2)
667 bd->bi_cpmfreq = gd->arch.cpm_clk;
668 bd->bi_brgfreq = gd->arch.brg_clk;
669 bd->bi_sccfreq = gd->arch.scc_clk;
670 bd->bi_vco = gd->arch.vco_out;
671#endif /* CONFIG_CPM2 */
672#if defined(CONFIG_MPC512X)
673 bd->bi_ipsfreq = gd->arch.ips_clk;
674#endif /* CONFIG_MPC512X */
675#if defined(CONFIG_MPC5xxx)
676 bd->bi_ipbfreq = gd->arch.ipb_clk;
677 bd->bi_pcifreq = gd->pci_clk;
678#endif /* CONFIG_MPC5xxx */
679
680 return 0;
681}
682#endif
683
684#ifdef CONFIG_SYS_EXTBDINFO
685static int setup_board_extra(void)
686{
687 bd_t *bd = gd->bd;
688
689 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
690 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
691 sizeof(bd->bi_r_version));
692
693 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
694 bd->bi_plb_busfreq = gd->bus_clk;
695#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
696 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
697 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
698 bd->bi_pci_busfreq = get_PCI_freq();
699 bd->bi_opbfreq = get_OPB_freq();
700#elif defined(CONFIG_XILINX_405)
701 bd->bi_pci_busfreq = get_PCI_freq();
702#endif
703
704 return 0;
705}
706#endif
707
Simon Glass1938f4a2013-03-11 06:49:53 +0000708#ifdef CONFIG_POST
709static int init_post(void)
710{
711 post_bootmode_init();
712 post_run(NULL, POST_ROM | post_bootmode_get(0));
713
714 return 0;
715}
716#endif
717
Simon Glass1938f4a2013-03-11 06:49:53 +0000718static int setup_dram_config(void)
719{
720 /* Ram is board specific, so move it to board code ... */
721 dram_init_banksize();
722
723 return 0;
724}
725
726static int reloc_fdt(void)
727{
728 if (gd->new_fdt) {
729 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
730 gd->fdt_blob = gd->new_fdt;
731 }
732
733 return 0;
734}
735
736static int setup_reloc(void)
737{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800738#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000739 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800740#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000741 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
742
743 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000744 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000745 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
746 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000747
748 return 0;
749}
750
751/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700752#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000753
754static int jump_to_copy(void)
755{
Simon Glass48a33802013-03-05 14:39:52 +0000756 /*
757 * x86 is special, but in a nice way. It uses a trampoline which
758 * enables the dcache if possible.
759 *
760 * For now, other archs use relocate_code(), which is implemented
761 * similarly for all archs. When we do generic relocation, hopefully
762 * we can make all archs enable the dcache prior to relocation.
763 */
764#ifdef CONFIG_X86
765 /*
766 * SDRAM and console are now initialised. The final stack can now
767 * be setup in SDRAM. Code execution will continue in Flash, but
768 * with the stack in SDRAM and Global Data in temporary memory
769 * (CPU cache)
770 */
771 board_init_f_r_trampoline(gd->start_addr_sp);
772#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000773 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000774#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000775
776 return 0;
777}
778#endif
779
780/* Record the board_init_f() bootstage (after arch_cpu_init()) */
781static int mark_bootstage(void)
782{
783 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
784
785 return 0;
786}
787
Simon Glassd59476b2014-07-10 22:23:28 -0600788static int initf_malloc(void)
789{
790#ifdef CONFIG_SYS_MALLOC_F_LEN
791 assert(gd->malloc_base); /* Set up by crt0.S */
792 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
793 gd->malloc_ptr = 0;
794#endif
795
796 return 0;
797}
798
Simon Glassab7cd622014-07-23 06:55:04 -0600799static int initf_dm(void)
800{
801#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
802 int ret;
803
804 ret = dm_init_and_scan(true);
805 if (ret)
806 return ret;
807#endif
808
809 return 0;
810}
811
Simon Glass1938f4a2013-03-11 06:49:53 +0000812static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000813#ifdef CONFIG_SANDBOX
814 setup_ram_buf,
815#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000816 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700817 setup_fdt,
818 trace_early_init,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000819#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
820 /* TODO: can this go into arch_cpu_init()? */
821 probecpu,
822#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000823 arch_cpu_init, /* basic arch cpu dependent setup */
Simon Glass48a33802013-03-05 14:39:52 +0000824#ifdef CONFIG_X86
825 cpu_init_f, /* TODO(sjg@chromium.org): remove */
826# ifdef CONFIG_OF_CONTROL
827 find_fdt, /* TODO(sjg@chromium.org): remove */
828# endif
829#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000830 mark_bootstage,
831#ifdef CONFIG_OF_CONTROL
832 fdtdec_check_fdt,
833#endif
834#if defined(CONFIG_BOARD_EARLY_INIT_F)
835 board_early_init_f,
836#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000837 /* TODO: can any of this go into arch_cpu_init()? */
838#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
839 get_clocks, /* get CPU and bus clocks (etc.) */
840#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
841 && !defined(CONFIG_TQM885D)
842 adjust_sdram_tbs_8xx,
843#endif
844 /* TODO: can we rename this to timer_init()? */
845 init_timebase,
846#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800847#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000848 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000849#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000850#ifdef CONFIG_SYS_ALLOC_DPRAM
851#if !defined(CONFIG_CPM2)
852 dpram_init,
853#endif
854#endif
855#if defined(CONFIG_BOARD_POSTCLK_INIT)
856 board_postclk_init,
857#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000858#ifdef CONFIG_FSL_ESDHC
859 get_clocks,
860#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000861 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000862#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
863 /* get CPU and bus clocks according to the environment variable */
864 get_clocks_866,
865 /* adjust sdram refresh rate according to the new clock */
866 sdram_adjust_866,
867 init_timebase,
868#endif
Simon Glassd59476b2014-07-10 22:23:28 -0600869 initf_malloc,
Simon Glassab7cd622014-07-23 06:55:04 -0600870 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000871 init_baud_rate, /* initialze baudrate settings */
872 serial_init, /* serial communications setup */
873 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000874#ifdef CONFIG_SANDBOX
875 sandbox_early_getopt_check,
876#endif
877#ifdef CONFIG_OF_CONTROL
878 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000879#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000880 display_options, /* say that we are here */
881 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900882#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000883 prt_8260_rsr,
884 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900885#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000886#if defined(CONFIG_MPC83xx)
887 prt_83xx_rsr,
888#endif
889#ifdef CONFIG_PPC
890 checkcpu,
891#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000892 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000893#if defined(CONFIG_MPC5xxx)
894 prt_mpc5xxx_clks,
895#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000896#if defined(CONFIG_DISPLAY_BOARDINFO)
897 checkboard, /* display board info */
898#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000899 INIT_FUNC_WATCHDOG_INIT
900#if defined(CONFIG_MISC_INIT_F)
901 misc_init_f,
902#endif
903 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100904#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000905 init_func_i2c,
906#endif
907#if defined(CONFIG_HARD_SPI)
908 init_func_spi,
909#endif
910#ifdef CONFIG_X86
911 dram_init_f, /* configure available RAM banks */
Simon Glass8b42dfc2013-04-15 11:22:49 +0000912 calculate_relocation_address,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000913#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000914 announce_dram_init,
915 /* TODO: unify all these dram functions? */
916#ifdef CONFIG_ARM
917 dram_init, /* configure available RAM banks */
918#endif
Paul Burton3da7e5a2014-04-07 10:11:20 +0100919#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000920 init_func_ram,
921#endif
922#ifdef CONFIG_POST
923 post_init_f,
924#endif
925 INIT_FUNC_WATCHDOG_RESET
926#if defined(CONFIG_SYS_DRAM_TEST)
927 testdram,
928#endif /* CONFIG_SYS_DRAM_TEST */
929 INIT_FUNC_WATCHDOG_RESET
930
Simon Glass1938f4a2013-03-11 06:49:53 +0000931#ifdef CONFIG_POST
932 init_post,
933#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000934 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000935 /*
936 * Now that we have DRAM mapped and working, we can
937 * relocate the code and continue running from DRAM.
938 *
939 * Reserve memory at end of RAM for (top down in that order):
940 * - area that won't get touched by U-Boot and Linux (optional)
941 * - kernel log buffer
942 * - protected RAM
943 * - LCD framebuffer
944 * - monitor code
945 * - board info struct
946 */
947 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800948#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800949 /* Blackfin u-boot monitor should be on top of the ram */
950 reserve_uboot,
951#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000952#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
953 reserve_logbuffer,
954#endif
955#ifdef CONFIG_PRAM
956 reserve_pram,
957#endif
958 reserve_round_4k,
959#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
960 defined(CONFIG_ARM)
961 reserve_mmu,
962#endif
963#ifdef CONFIG_LCD
964 reserve_lcd,
965#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700966 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000967 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800968#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
969 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
970 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000971 reserve_video,
972#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800973#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000974 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800975#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000976#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000977 reserve_malloc,
978 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000979#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000980 setup_machine,
981 reserve_global_data,
982 reserve_fdt,
983 reserve_stacks,
984 setup_dram_config,
985 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000986#ifdef CONFIG_PPC
987 setup_board_part1,
988 INIT_FUNC_WATCHDOG_RESET
989 setup_board_part2,
990#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000991 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000992#ifdef CONFIG_SYS_EXTBDINFO
993 setup_board_extra,
994#endif
995 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000996 reloc_fdt,
997 setup_reloc,
Simon Glass808434c2013-11-10 10:26:59 -0700998#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000999 jump_to_copy,
1000#endif
1001 NULL,
1002};
1003
1004void board_init_f(ulong boot_flags)
1005{
York Sun2a1680e2014-05-02 17:28:04 -07001006#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1007 /*
1008 * For some archtectures, global data is initialized and used before
1009 * calling this function. The data should be preserved. For others,
1010 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1011 * here to host global data until relocation.
1012 */
Simon Glass1938f4a2013-03-11 06:49:53 +00001013 gd_t data;
1014
1015 gd = &data;
1016
David Fengcce6be72013-12-14 11:47:36 +08001017 /*
1018 * Clear global data before it is accessed at debug print
1019 * in initcall_run_list. Otherwise the debug print probably
1020 * get the wrong vaule of gd->have_console.
1021 */
David Fengcce6be72013-12-14 11:47:36 +08001022 zero_global_data();
1023#endif
1024
Simon Glass1938f4a2013-03-11 06:49:53 +00001025 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001026 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001027
1028 if (initcall_run_list(init_sequence_f))
1029 hang();
1030
Simon Glass808434c2013-11-10 10:26:59 -07001031#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001032 /* NOTREACHED - jump_to_copy() does not return */
1033 hang();
1034#endif
1035}
1036
Simon Glass48a33802013-03-05 14:39:52 +00001037#ifdef CONFIG_X86
1038/*
1039 * For now this code is only used on x86.
1040 *
1041 * init_sequence_f_r is the list of init functions which are run when
1042 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1043 * The following limitations must be considered when implementing an
1044 * '_f_r' function:
1045 * - 'static' variables are read-only
1046 * - Global Data (gd->xxx) is read/write
1047 *
1048 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1049 * supported). It _should_, if possible, copy global data to RAM and
1050 * initialise the CPU caches (to speed up the relocation process)
1051 *
1052 * NOTE: At present only x86 uses this route, but it is intended that
1053 * all archs will move to this when generic relocation is implemented.
1054 */
1055static init_fnc_t init_sequence_f_r[] = {
1056 init_cache_f_r,
1057 copy_uboot_to_ram,
1058 clear_bss,
1059 do_elf_reloc_fixups,
1060
1061 NULL,
1062};
1063
1064void board_init_f_r(void)
1065{
1066 if (initcall_run_list(init_sequence_f_r))
1067 hang();
1068
1069 /*
1070 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1071 * Transfer execution from Flash to RAM by calculating the address
1072 * of the in-RAM copy of board_init_r() and calling it
1073 */
1074 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1075
1076 /* NOTREACHED - board_init_r() does not return */
1077 hang();
1078}
1079#endif /* CONFIG_X86 */