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Chris Packhamc0def242016-09-22 12:56:14 +12001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_AMC_H
8#define _CONFIG_DB_88F6820_AMC_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
13
14#define CONFIG_DISPLAY_BOARDINFO_LATE
15
16/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
22#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
23
24/*
25 * Commands configuration
26 */
Chris Packhamc0def242016-09-22 12:56:14 +120027
Chris Packhamc0def242016-09-22 12:56:14 +120028/* SPI NOR flash default params, used by sf commands */
29#define CONFIG_SF_DEFAULT_BUS 1
30#define CONFIG_SF_DEFAULT_SPEED 1000000
31#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
32
Chris Packhamc0def242016-09-22 12:56:14 +120033/* USB/EHCI configuration */
34#define CONFIG_EHCI_IS_TDI
35
36/* Environment in SPI NOR flash */
Chris Packhamc0def242016-09-22 12:56:14 +120037#define CONFIG_ENV_SPI_BUS 1
38#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
39#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
40#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
41
42#define CONFIG_PHY_MARVELL /* there is a marvell phy */
43#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
44
45/* PCIe support */
46#ifndef CONFIG_SPL_BUILD
Chris Packhamc0def242016-09-22 12:56:14 +120047#define CONFIG_PCI_MVEBU
Chris Packhamc0def242016-09-22 12:56:14 +120048#define CONFIG_PCI_SCAN_SHOW
49#endif
50
Chris Packham42f75052016-09-22 12:56:15 +120051/* NAND */
52#define CONFIG_SYS_NAND_USE_FLASH_BBT
53#define CONFIG_SYS_NAND_ONFI_DETECTION
54
Chris Packhamc0def242016-09-22 12:56:14 +120055#define CONFIG_SYS_ALT_MEMTEST
56
57/* Keep device tree and initrd in lower memory so the kernel can access them */
58#define CONFIG_EXTRA_ENV_SETTINGS \
59 "fdt_high=0x10000000\0" \
60 "initrd_high=0x10000000\0"
61
62/* SPL */
63/*
64 * Select the boot device here
65 *
66 * Currently supported are:
67 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
68 *
69 * MMC is not populated on this board.
70 * NAND support may be added in the future.
71 */
72#define SPL_BOOT_SPI_NOR_FLASH 1
73#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
74
75/* Defines for SPL */
76#define CONFIG_SPL_FRAMEWORK
77#define CONFIG_SPL_SIZE (140 << 10)
78#define CONFIG_SPL_TEXT_BASE 0x40000030
79#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
80
81#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
82#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
83
84#ifdef CONFIG_SPL_BUILD
85#define CONFIG_SYS_MALLOC_SIMPLE
86#endif
87
88#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
89#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
90
91#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
92/* SPL related SPI defines */
93#define CONFIG_SPL_SPI_LOAD
94#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
95#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
96#endif
97
98/*
99 * mv-common.h should be defined after CMD configs since it used them
100 * to enable certain macros
101 */
102#include "mv-common.h"
103#undef CONFIG_SYS_MAXARGS
104#define CONFIG_SYS_MAXARGS 96
105
106#endif /* _CONFIG_DB_88F6820_AMC_H */