blob: 523f2388e4fd2026b353eed9df8a29f5c87c2c5e [file] [log] [blame]
Mike Frysingerd4d77302008-02-04 19:26:55 -05001/*
2 * PPI Masks
3 */
4
5#ifndef __BFIN_PERIPHERAL_PPI__
6#define __BFIN_PERIPHERAL_PPI__
7
8/* PPI_CONTROL Masks */
9#define PORT_EN 0x0001 /* PPI Port Enable */
10#define PORT_DIR 0x0002 /* PPI Port Direction */
11#define XFR_TYPE 0x000C /* PPI Transfer Type */
12#define PORT_CFG 0x0030 /* PPI Port Configuration */
13#define FLD_SEL 0x0040 /* PPI Active Field Select */
14#define PACK_EN 0x0080 /* PPI Packing Mode */
15#define DMA32 0x0100 /* PPI 32-bit DMA Enable */
16#define SKIP_EN 0x0200 /* PPI Skip Element Enable */
17#define SKIP_EO 0x0400 /* PPI Skip Even/Odd Elements */
18#define DLENGTH 0x3800 /* PPI Data Length */
19#define DLEN_8 0x0000 /* Data Length = 8 Bits */
20#define DLEN_10 0x0800 /* Data Length = 10 Bits */
21#define DLEN_11 0x1000 /* Data Length = 11 Bits */
22#define DLEN_12 0x1800 /* Data Length = 12 Bits */
23#define DLEN_13 0x2000 /* Data Length = 13 Bits */
24#define DLEN_14 0x2800 /* Data Length = 14 Bits */
25#define DLEN_15 0x3000 /* Data Length = 15 Bits */
26#define DLEN_16 0x3800 /* Data Length = 16 Bits */
27#define POLC 0x4000 /* PPI Clock Polarity */
28#define POLS 0x8000 /* PPI Frame Sync Polarity */
29
30/* PPI_STATUS Masks */
31#define FLD 0x0400 /* Field Indicator */
32#define FT_ERR 0x0800 /* Frame Track Error */
33#define OVR 0x1000 /* FIFO Overflow Error */
34#define UNDR 0x2000 /* FIFO Underrun Error */
35#define ERR_DET 0x4000 /* Error Detected Indicator */
36#define ERR_NCOR 0x8000 /* Error Not Corrected Indicator */
37
38#endif