Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 2 | /* |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 3 | * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu> |
Michal Simek | 53ea981 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 4 | * Clean driver and add xilinx constant from header file |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 5 | * |
Michal Simek | 53ea981 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 6 | * (C) Copyright 2004 Atmark Techno, Inc. |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 7 | * Yasushi SHOJI <yashi@atmark-techno.com> |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <config.h> |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 11 | #include <common.h> |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 12 | #include <dm.h> |
Michal Simek | 53ea981 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 13 | #include <asm/io.h> |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 14 | #include <linux/compiler.h> |
| 15 | #include <serial.h> |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 16 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 17 | #define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */ |
| 18 | #define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */ |
| 19 | #define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */ |
| 20 | #define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */ |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 21 | |
Michal Simek | 8c3bd6b | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 22 | #define ULITE_CONTROL_RST_TX 0x01 |
| 23 | #define ULITE_CONTROL_RST_RX 0x02 |
| 24 | |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 25 | struct uartlite { |
| 26 | unsigned int rx_fifo; |
| 27 | unsigned int tx_fifo; |
| 28 | unsigned int status; |
Michal Simek | 8c3bd6b | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 29 | unsigned int control; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 30 | }; |
wdenk | 507bbe3 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 31 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 32 | struct uartlite_platdata { |
| 33 | struct uartlite *regs; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 34 | }; |
| 35 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 36 | static int uartlite_serial_putc(struct udevice *dev, const char ch) |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 37 | { |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 38 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 39 | struct uartlite *regs = plat->regs; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 40 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 41 | if (in_be32(®s->status) & SR_TX_FIFO_FULL) |
| 42 | return -EAGAIN; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 43 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 44 | out_be32(®s->tx_fifo, ch & 0xff); |
| 45 | |
| 46 | return 0; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 47 | } |
| 48 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 49 | static int uartlite_serial_getc(struct udevice *dev) |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 50 | { |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 51 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 52 | struct uartlite *regs = plat->regs; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 53 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 54 | if (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA)) |
| 55 | return -EAGAIN; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 56 | |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 57 | return in_be32(®s->rx_fifo) & 0xff; |
| 58 | } |
| 59 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 60 | static int uartlite_serial_pending(struct udevice *dev, bool input) |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 61 | { |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 62 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 63 | struct uartlite *regs = plat->regs; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 64 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 65 | if (input) |
| 66 | return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA; |
| 67 | |
| 68 | return !(in_be32(®s->status) & SR_TX_FIFO_EMPTY); |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 69 | } |
| 70 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 71 | static int uartlite_serial_probe(struct udevice *dev) |
Michal Simek | 25239e1 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 72 | { |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 73 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 74 | struct uartlite *regs = plat->regs; |
Michal Simek | 8c3bd6b | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 75 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 76 | out_be32(®s->control, 0); |
| 77 | out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
| 78 | in_be32(®s->control); |
Michal Simek | 8c3bd6b | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 79 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 80 | return 0; |
Michal Simek | 25239e1 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 81 | } |
| 82 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 83 | static int uartlite_serial_ofdata_to_platdata(struct udevice *dev) |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 84 | { |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 85 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
Michal Simek | 25239e1 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 86 | |
Simon Glass | a821c4a | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 87 | plat->regs = (struct uartlite *)devfdt_get_addr(dev); |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 88 | |
| 89 | return 0; |
Michal Simek | 49a23e4 | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 90 | } |
Marek Vasut | 87d6922 | 2012-09-12 19:45:58 +0200 | [diff] [blame] | 91 | |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 92 | static const struct dm_serial_ops uartlite_serial_ops = { |
| 93 | .putc = uartlite_serial_putc, |
| 94 | .pending = uartlite_serial_pending, |
| 95 | .getc = uartlite_serial_getc, |
| 96 | }; |
| 97 | |
| 98 | static const struct udevice_id uartlite_serial_ids[] = { |
| 99 | { .compatible = "xlnx,opb-uartlite-1.00.b", }, |
| 100 | { .compatible = "xlnx,xps-uartlite-1.00.a" }, |
| 101 | { } |
| 102 | }; |
| 103 | |
| 104 | U_BOOT_DRIVER(serial_uartlite) = { |
| 105 | .name = "serial_uartlite", |
| 106 | .id = UCLASS_SERIAL, |
| 107 | .of_match = uartlite_serial_ids, |
| 108 | .ofdata_to_platdata = uartlite_serial_ofdata_to_platdata, |
| 109 | .platdata_auto_alloc_size = sizeof(struct uartlite_platdata), |
| 110 | .probe = uartlite_serial_probe, |
| 111 | .ops = &uartlite_serial_ops, |
Michal Simek | 9376839 | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 112 | }; |
Michal Simek | 4166ba3 | 2015-12-14 16:55:10 +0100 | [diff] [blame] | 113 | |
| 114 | #ifdef CONFIG_DEBUG_UART_UARTLITE |
| 115 | |
| 116 | #include <debug_uart.h> |
| 117 | |
| 118 | static inline void _debug_uart_init(void) |
| 119 | { |
| 120 | struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; |
| 121 | |
| 122 | out_be32(®s->control, 0); |
| 123 | out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
| 124 | in_be32(®s->control); |
| 125 | } |
| 126 | |
| 127 | static inline void _debug_uart_putc(int ch) |
| 128 | { |
| 129 | struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; |
| 130 | |
| 131 | while (in_be32(®s->status) & SR_TX_FIFO_FULL) |
| 132 | ; |
| 133 | |
| 134 | out_be32(®s->tx_fifo, ch & 0xff); |
| 135 | } |
| 136 | |
| 137 | DEBUG_UART_FUNCS |
| 138 | #endif |