blob: 7f08961491a62780395a06adbd7fcb2480971e70 [file] [log] [blame]
Michal Simek6d6e3db2015-07-22 11:39:04 +02001/*
2 * Xilinx ZC770 XM013 board DTS
3 *
4 * Copyright (C) 2013 Xilinx, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8/dts-v1/;
9#include "zynq-7000.dtsi"
Michal Simekb347c142016-04-07 15:24:08 +020010
Michal Simek6d6e3db2015-07-22 11:39:04 +020011/ {
12 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
13 model = "Xilinx Zynq";
14
15 aliases {
16 i2c0 = &i2c1;
17 serial0 = &uart1;
18 spi0 = &spi0;
19 };
20
21 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020022 bootargs = "";
Michal Simek46919412016-01-12 13:56:44 +010023 stdout-path = "serial0:115200n8";
Michal Simek6d6e3db2015-07-22 11:39:04 +020024 };
25
Michal Simekcc7978b2016-11-11 13:11:37 +010026 memory@0 {
Michal Simek6d6e3db2015-07-22 11:39:04 +020027 device_type = "memory";
28 reg = <0x0 0x40000000>;
29 };
30
31 usb_phy1: phy1 {
32 compatible = "usb-nop-xceiv";
33 #phy-cells = <0>;
34 };
35};
36
Michal Simek6d6e3db2015-07-22 11:39:04 +020037&can0 {
38 status = "okay";
39};
40
41&i2c1 {
42 status = "okay";
43 clock-frequency = <400000>;
44
45 m24c02_eeprom@52 {
46 compatible = "at,24c02";
47 reg = <0x52>;
48 };
49};
50
Michal Simek7ebf67a2016-01-14 13:09:16 +010051&spi0 {
52 status = "okay";
53 num-cs = <4>;
54 is-decoded-cs = <0>;
55};
56
Michal Simek6d6e3db2015-07-22 11:39:04 +020057&uart1 {
Simon Glass035c6b22015-10-17 19:41:24 -060058 u-boot,dm-pre-reloc;
Michal Simek6d6e3db2015-07-22 11:39:04 +020059 status = "okay";
60};
61
62&usb1 {
63 status = "okay";
64 dr_mode = "host";
65 usb-phy = <&usb_phy1>;
66};