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stefano babic5e5803e2007-08-30 23:01:49 +02001/*
2 * (C) Copyright 2007
3 * Stefano Babic, DENX Gmbh, sbabic@denx.de
4 *
5 * (C) Copyright 2004
6 * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
7 *
8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <asm/arch/pxa-regs.h>
Marek Vasut4438a452011-11-26 11:17:32 +010036#include <asm/arch/pxa.h>
Remy Bohmer60f61e62009-05-02 21:49:18 +020037#include <netdev.h>
Marek Vasut3ba8bf72010-09-09 09:50:39 +020038#include <asm/io.h>
stefano babic5e5803e2007-08-30 23:01:49 +020039
40DECLARE_GLOBAL_DATA_PTR;
41
42#define RH_A_PSM (1 << 8) /* power switching mode */
43#define RH_A_NPS (1 << 9) /* no power switching */
44
45extern struct serial_device serial_ffuart_device;
46extern struct serial_device serial_btuart_device;
47extern struct serial_device serial_stuart_device;
48
Marek Vasut7c957c02010-10-04 00:21:51 +020049#if CONFIG_MK_POLARIS
Stefano Babic040f8f62009-07-01 20:40:41 +020050#define BOOT_CONSOLE "serial_stuart"
51#else
52#define BOOT_CONSOLE "serial_ffuart"
53#endif
stefano babic5e5803e2007-08-30 23:01:49 +020054/* ------------------------------------------------------------------------- */
55
56/*
57 * Miscelaneous platform dependent initialisations
58 */
59
Stefano Babic88bd9752009-07-01 04:33:56 +020060int usb_board_init(void)
stefano babic5e5803e2007-08-30 23:01:49 +020061{
Marek Vasut3ba8bf72010-09-09 09:50:39 +020062 writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
63 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
64 UHCHR);
stefano babic5e5803e2007-08-30 23:01:49 +020065
Marek Vasut3ba8bf72010-09-09 09:50:39 +020066 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
stefano babic5e5803e2007-08-30 23:01:49 +020067
Marek Vasut3ba8bf72010-09-09 09:50:39 +020068 while (readl(UHCHR) & UHCHR_FSBIR)
69 ;
stefano babic5e5803e2007-08-30 23:01:49 +020070
Marek Vasut3ba8bf72010-09-09 09:50:39 +020071 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
72 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
stefano babic5e5803e2007-08-30 23:01:49 +020073
74 /* Clear any OTG Pin Hold */
Marek Vasut3ba8bf72010-09-09 09:50:39 +020075 if (readl(PSSR) & PSSR_OTGPH)
76 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
stefano babic5e5803e2007-08-30 23:01:49 +020077
Marek Vasut3ba8bf72010-09-09 09:50:39 +020078 writel(readl(UHCRHDA) & ~(RH_A_NPS), UHCRHDA);
79 writel(readl(UHCRHDA) | RH_A_PSM, UHCRHDA);
stefano babic5e5803e2007-08-30 23:01:49 +020080
81 /* Set port power control mask bits, only 3 ports. */
Marek Vasut3ba8bf72010-09-09 09:50:39 +020082 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
Stefano Babic88bd9752009-07-01 04:33:56 +020083
84 return 0;
stefano babic5e5803e2007-08-30 23:01:49 +020085}
86
87void usb_board_init_fail(void)
88{
89 return;
90}
91
92void usb_board_stop(void)
93{
Marek Vasut3ba8bf72010-09-09 09:50:39 +020094 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
stefano babic5e5803e2007-08-30 23:01:49 +020095 udelay(11);
Marek Vasut3ba8bf72010-09-09 09:50:39 +020096 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
stefano babic5e5803e2007-08-30 23:01:49 +020097
Marek Vasut3ba8bf72010-09-09 09:50:39 +020098 writel(readl(UHCCOMS) | 1, UHCCOMS);
stefano babic5e5803e2007-08-30 23:01:49 +020099 udelay(10);
100
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200101 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
stefano babic5e5803e2007-08-30 23:01:49 +0200102
stefano babic5e5803e2007-08-30 23:01:49 +0200103 return;
104}
105
106int board_init (void)
107{
Marek Vasutcc72ac62010-10-20 21:28:14 +0200108 /* We have RAM, disable cache */
109 dcache_disable();
110 icache_disable();
stefano babic5e5803e2007-08-30 23:01:49 +0200111
112 /* arch number of ConXS Board */
113 gd->bd->bi_arch_number = 776;
114
115 /* adress of boot parameters */
116 gd->bd->bi_boot_params = 0xa000003c;
117
118 return 0;
119}
120
121int board_late_init(void)
122{
123#if defined(CONFIG_SERIAL_MULTI)
124 char *console=getenv("boot_console");
125
Stefano Babic040f8f62009-07-01 20:40:41 +0200126 if ((console == NULL) || (strcmp(console,"serial_btuart") &&
127 strcmp(console,"serial_stuart") &&
128 strcmp(console,"serial_ffuart"))) {
129 console = BOOT_CONSOLE;
stefano babic5e5803e2007-08-30 23:01:49 +0200130 }
Stefano Babic040f8f62009-07-01 20:40:41 +0200131 setenv("stdout",console);
132 setenv("stdin", console);
133 setenv("stderr",console);
stefano babic5e5803e2007-08-30 23:01:49 +0200134#endif
135 return 0;
136}
137
138struct serial_device *default_serial_console (void)
139{
140 return &serial_ffuart_device;
141}
142
Marek Vasutcc72ac62010-10-20 21:28:14 +0200143int dram_init(void)
144{
Marek Vasutf68d2a22011-11-26 11:18:57 +0100145 pxa2xx_dram_init();
Marek Vasutcc72ac62010-10-20 21:28:14 +0200146 gd->ram_size = PHYS_SDRAM_1_SIZE;
147 return 0;
148}
149
150void dram_init_banksize(void)
stefano babic5e5803e2007-08-30 23:01:49 +0200151{
152 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
153 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
stefano babic5e5803e2007-08-30 23:01:49 +0200154}
Remy Bohmer60f61e62009-05-02 21:49:18 +0200155
156#ifdef CONFIG_DRIVER_DM9000
157int board_eth_init(bd_t *bis)
158{
159 return dm9000_initialize(bis);
160}
161#endif