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Sandeep Paulraj6ab176d2009-10-10 12:00:47 -04001/*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
22
23/* Spectrum Digital TMS320DM6467 EVM board */
24#define DAVINCI_DM6467EVM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050025#define CONFIG_SYS_USE_NAND
26#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040027
28#define CONFIG_SKIP_LOWLEVEL_INIT
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040029
30/* SoC Configuration */
31#define CONFIG_ARM926EJS /* arm926ejs CPU */
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050032
33/* Clock rates detection */
34#ifndef __ASSEMBLY__
35extern unsigned int davinci_arm_clk_get(void);
36#endif
37
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050038/* Arm Clock frequency */
39#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
40/* Timer Input clock freq */
41#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040042#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040043#define CONFIG_SYS_HZ 1000
44#define CONFIG_SOC_DM646X
45
46/* EEPROM definitions for EEPROM */
47#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
48#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
49#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
50#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
51
52/* Memory Info */
53#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040054#define CONFIG_SYS_MEMTEST_START 0x80000000
55#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
56#define CONFIG_NR_DRAM_BANKS 1
57#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
58#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
59#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
60
61/* Linux interfacing */
62#define CONFIG_CMDLINE_TAG
63#define CONFIG_SETUP_MEMORY_TAGS
64#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
65#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
Manjunath Hadlib79df8f2011-11-08 08:59:57 -050066#define CONFIG_REVISION_TAG
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040067
68/* Serial Driver info */
69#define CONFIG_SYS_NS16550
70#define CONFIG_SYS_NS16550_SERIAL
71#define CONFIG_SYS_NS16550_REG_SIZE 4
72#define CONFIG_SYS_NS16550_COM1 0x01c20000
73#define CONFIG_SYS_NS16550_CLK 24000000
74#define CONFIG_CONS_INDEX 1
75#define CONFIG_BAUDRATE 115200
76#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
77
78/* I2C Configuration */
79#define CONFIG_HARD_I2C
80#define CONFIG_DRIVER_DAVINCI_I2C
81#define CONFIG_SYS_I2C_SPEED 80000
82#define CONFIG_SYS_I2C_SLAVE 10
83
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050084/* Network & Ethernet Configuration */
85#define CONFIG_DRIVER_TI_EMAC
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050086#define CONFIG_MII
87#define CONFIG_BOOTP_DEFAULT
88#define CONFIG_BOOTP_DNS
89#define CONFIG_BOOTP_DNS2
90#define CONFIG_BOOTP_SEND_HOSTNAME
91#define CONFIG_NET_RETRY_COUNT 10
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050092#define CONFIG_CMD_NET
93
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040094/* Flash & Environment */
95#define CONFIG_SYS_NO_FLASH
96#ifdef CONFIG_SYS_USE_NAND
97#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050098#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040099#undef CONFIG_ENV_IS_IN_FLASH
100#define CONFIG_ENV_IS_IN_NAND
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400101#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
102#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
103#define CONFIG_SYS_NAND_HW_ECC
104#define CONFIG_SYS_MAX_NAND_DEVICE 1
105#define CONFIG_ENV_OFFSET 0
106#else
107#define CONFIG_ENV_IS_NOWHERE
108#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
109#endif
110
111/* U-Boot general configuration */
112#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
113#define CONFIG_BOOTDELAY 3
114#define CONFIG_BOOTFILE "uImage" /* Boot file name */
115#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
116#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
117#define CONFIG_SYS_PBSIZE \
118 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
119#define CONFIG_SYS_MAXARGS 16
120#define CONFIG_VERSION_VARIABLE
121#define CONFIG_AUTO_COMPLETE
122#define CONFIG_SYS_HUSH_PARSER
123#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
124#define CONFIG_CMDLINE_EDITING
125#define CONFIG_SYS_LONGHELP
126#define CONFIG_CRC32_VERIFY
127#define CONFIG_MX_CYCLIC
128#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
129#define CONFIG_BOOTARGS \
130 "mem=120M console=ttyS0,115200n8 " \
131 "root=/dev/hda1 rw noinitrd ip=dhcp"
132
133/* U-Boot commands */
134#include <config_cmd_default.h>
135#define CONFIG_CMD_ASKENV
136#define CONFIG_CMD_DIAG
137#define CONFIG_CMD_I2C
138#define CONFIG_CMD_MII
139#define CONFIG_CMD_SAVES
140#define CONFIG_CMD_EEPROM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -0500141#define CONFIG_CMD_PING
142#define CONFIG_CMD_DHCP
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400143#undef CONFIG_CMD_BDI
144#undef CONFIG_CMD_FPGA
145#undef CONFIG_CMD_SETGETDCR
146#ifdef CONFIG_SYS_USE_NAND
147#undef CONFIG_CMD_FLASH
148#undef CONFIG_CMD_IMLS
149#define CONFIG_CMD_NAND
150#endif
151
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000152#ifdef CONFIG_CMD_BDI
153#define CONFIG_CLOCKS
154#endif
155
Sandeep Paulraj8a16f9c2010-12-11 20:38:57 -0500156#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
157
158#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
159#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
160#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
161 CONFIG_SYS_INIT_RAM_SIZE - \
162 GENERATED_GBL_DATA_SIZE)
163
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400164#endif /* __CONFIG_H */