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Ilya Yanok0d19f6c2009-02-10 00:22:31 +01001/*
2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
3 *
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
Stefano Babic86271112011-03-14 15:43:56 +010025#include <asm/arch/imx-regs.h>
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010026
Stefano Babic22a9ea92011-06-09 16:43:26 +020027/* High Level Configuration Options */
Fabio Estevam8a508e32011-10-21 07:03:54 +000028#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
29#define CONFIG_MX31 /* in a mx31 */
30#define CONFIG_QONG
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010031#define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
32#define CONFIG_MX31_CLK32 32768
33
34#define CONFIG_DISPLAY_CPUINFO
35#define CONFIG_DISPLAY_BOARDINFO
36
Stefano Babic22a9ea92011-06-09 16:43:26 +020037#define CONFIG_SYS_TEXT_BASE 0xa0000000
38
Fabio Estevam8a508e32011-10-21 07:03:54 +000039#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
40#define CONFIG_SETUP_MEMORY_TAGS
41#define CONFIG_INITRD_TAG
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010042
43/*
44 * Size of malloc() pool
45 */
Wolfgang Denk544aa662011-10-25 09:48:16 +000046#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1536 * 1024)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010047
48/*
49 * Hardware drivers
50 */
51
Stefano Babic40f6fff2011-11-22 15:22:39 +010052#define CONFIG_MXC_UART
53#define CONFIG_MXC_UART_BASE UART1_BASE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010054
Stefano Babicc4ea1422010-07-06 17:05:06 +020055#define CONFIG_MXC_GPIO
Stefano Babic8640c982011-02-02 00:49:37 +000056#define CONFIG_HW_WATCHDOG
Stefano Babic45997e02010-03-29 16:43:39 +020057
Stefano Babice98ecd72010-04-16 17:13:54 +020058#define CONFIG_MXC_SPI
59#define CONFIG_DEFAULT_SPI_BUS 1
Stefano Babic9f481e92010-08-23 20:41:19 +020060#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Fabio Estevam4e8b7542011-10-24 06:44:15 +000061#define CONFIG_RTC_MC13XXX
Stefano Babice98ecd72010-04-16 17:13:54 +020062
Stefano Babicf33bd082011-10-06 11:23:33 +020063#define CONFIG_PMIC
64#define CONFIG_PMIC_SPI
65#define CONFIG_PMIC_FSL
Stefano Babice98ecd72010-04-16 17:13:54 +020066#define CONFIG_FSL_PMIC_BUS 1
67#define CONFIG_FSL_PMIC_CS 0
68#define CONFIG_FSL_PMIC_CLK 100000
Stefano Babic9f481e92010-08-23 20:41:19 +020069#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babicf33bd082011-10-06 11:23:33 +020070#define CONFIG_FSL_PMIC_BITLEN 32
Stefano Babice98ecd72010-04-16 17:13:54 +020071
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010072/* FPGA */
Stefano Babicb9eb3fd2010-06-29 11:48:24 +020073#define CONFIG_FPGA
Fabio Estevam8a508e32011-10-21 07:03:54 +000074#define CONFIG_QONG_FPGA
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010075#define CONFIG_FPGA_BASE (CS1_BASE)
Stefano Babicb9eb3fd2010-06-29 11:48:24 +020076#define CONFIG_FPGA_LATTICE
77#define CONFIG_FPGA_COUNT 1
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010078
79#ifdef CONFIG_QONG_FPGA
80/* Ethernet */
Fabio Estevam8a508e32011-10-21 07:03:54 +000081#define CONFIG_DNET
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010082#define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010083
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020084/* Framebuffer and LCD */
Helmut Raiger62a22dc2011-10-12 23:16:29 +000085#define CONFIG_VIDEO
86#define CONFIG_CFB_CONSOLE
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020087#define CONFIG_VIDEO_MX3
Helmut Raiger62a22dc2011-10-12 23:16:29 +000088#define CONFIG_VIDEO_LOGO
89#define CONFIG_VIDEO_SW_CURSOR
90#define CONFIG_VGA_AS_SINGLE_DEVICE
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020091#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Helmut Raiger62a22dc2011-10-12 23:16:29 +000092#define CONFIG_SPLASH_SCREEN
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020093#define CONFIG_CMD_BMP
94#define CONFIG_BMP_16BPP
Wolfgang Denk544aa662011-10-25 09:48:16 +000095#define CONFIG_VIDEO_BMP_GZIP
96#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020097
Stefano Babicd7dc4642010-10-05 14:05:11 +020098/* USB */
99#define CONFIG_CMD_USB
100#ifdef CONFIG_CMD_USB
101#define CONFIG_USB_EHCI /* Enable EHCI USB support */
102#define CONFIG_USB_EHCI_MXC
103#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
104#define CONFIG_MXC_USB_PORT 2
105#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
106#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
107#define CONFIG_EHCI_IS_TDI
108#define CONFIG_USB_STORAGE
109#define CONFIG_DOS_PARTITION
110#define CONFIG_SUPPORT_VFAT
Wolfgang Denkb952c242010-10-19 11:10:06 +0200111#define CONFIG_CMD_EXT2
Stefano Babicd7dc4642010-10-05 14:05:11 +0200112#define CONFIG_CMD_FAT
113#endif /* CONFIG_CMD_USB */
114
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100115/*
116 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
117 * initial TFTP transfer, should the user wish one, significantly.
118 */
119#define CONFIG_ARP_TIMEOUT 200UL
120
121#endif /* CONFIG_QONG_FPGA */
122
123#define CONFIG_CONS_INDEX 1
124#define CONFIG_BAUDRATE 115200
125#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
126
127/***********************************************************
128 * Command definition
129 ***********************************************************/
130
131#include <config_cmd_default.h>
132
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200133#define CONFIG_CMD_CACHE
Wolfgang Denkb952c242010-10-19 11:10:06 +0200134#define CONFIG_CMD_DATE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100135#define CONFIG_CMD_DHCP
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100136#define CONFIG_CMD_MII
Stefano Babic45997e02010-03-29 16:43:39 +0200137#define CONFIG_CMD_NAND
Wolfgang Denkb952c242010-10-19 11:10:06 +0200138#define CONFIG_CMD_NET
139#define CONFIG_CMD_PING
140#define CONFIG_CMD_SETEXPR
Stefano Babice98ecd72010-04-16 17:13:54 +0200141#define CONFIG_CMD_SPI
Wolfgang Denk544aa662011-10-25 09:48:16 +0000142#define CONFIG_CMD_UNZIP
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100143
Helmut Raiger9660e442011-10-20 04:19:47 +0000144#define CONFIG_BOARD_LATE_INIT
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100145
146#define CONFIG_BOOTDELAY 5
147
148#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
149
150#define xstr(s) str(s)
151#define str(s) #s
152
153#define CONFIG_EXTRA_ENV_SETTINGS \
154 "netdev=eth0\0" \
155 "nfsargs=setenv bootargs root=/dev/nfs rw " \
156 "nfsroot=${serverip}:${rootpath}\0" \
157 "ramargs=setenv bootargs root=/dev/ram rw\0" \
158 "addip=setenv bootargs ${bootargs} " \
159 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
160 ":${hostname}:${netdev}:off panic=1\0" \
161 "addtty=setenv bootargs ${bootargs}" \
162 " console=ttymxc0,${baudrate}\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100163 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100164 "addmisc=setenv bootargs ${bootargs}\0" \
Wolfgang Denk8a1cdaa2010-04-28 12:54:43 +0200165 "uboot_addr=A0000000\0" \
Wolfgang Denkb952c242010-10-19 11:10:06 +0200166 "kernel_addr=A00C0000\0" \
Wolfgang Denk8a1cdaa2010-04-28 12:54:43 +0200167 "ramdisk_addr=A0300000\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100168 "u-boot=qong/u-boot.bin\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100169 "kernel_addr_r=80800000\0" \
170 "hostname=qong\0" \
171 "bootfile=qong/uImage\0" \
172 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100173 "flash_self=run ramargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100174 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100175 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100176 "bootm ${kernel_addr}\0" \
177 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100178 "run nfsargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100179 "bootm\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100180 "bootcmd=run flash_self\0" \
181 "load=tftp ${loadaddr} ${u-boot}\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100182 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
183 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
184 " +${filesize};cp.b ${fileaddr} " \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100185 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100186 "upd=run load update\0" \
Helmut Raiger62a22dc2011-10-12 23:16:29 +0000187 "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000," \
188 "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296," \
189 "vmode:0\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100190
191/*
192 * Miscellaneous configurable options
193 */
194#define CONFIG_SYS_LONGHELP /* undef to save memory */
195#define CONFIG_SYS_PROMPT "=> "
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100196#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100197/* Print Buffer Size */
198#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
199 sizeof(CONFIG_SYS_PROMPT) + 16)
200#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
201/* Boot Argument Buffer Size */
202#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
203
204/* memtest works on first 255MB of RAM */
205#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
206#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
207
208#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
209
210#define CONFIG_SYS_HZ 1000
211
Fabio Estevam8a508e32011-10-21 07:03:54 +0000212#define CONFIG_CMDLINE_EDITING
213#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
Wolfgang Denk8a1cdaa2010-04-28 12:54:43 +0200214#ifdef CONFIG_SYS_HUSH_PARSER
215#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
216#endif
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100217
Fabio Estevam8a508e32011-10-21 07:03:54 +0000218#define CONFIG_MISC_INIT_R
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100219/*-----------------------------------------------------------------------
220 * Stack sizes
221 *
222 * The stack sizes are set up in start.S using the settings below
223 */
224#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
225
226/*-----------------------------------------------------------------------
227 * Physical Memory Map
228 */
229#define CONFIG_NR_DRAM_BANKS 1
230#define PHYS_SDRAM_1 CSD0_BASE
231#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
232
Stefano Babic45997e02010-03-29 16:43:39 +0200233/*
234 * NAND driver
235 */
236
237#ifndef __ASSEMBLY__
238extern void qong_nand_plat_init(void *chip);
239extern int qong_nand_rdy(void *chip);
240#endif
241#define CONFIG_NAND_PLAT
242#define CONFIG_SYS_MAX_NAND_DEVICE 1
243#define CONFIG_SYS_NAND_BASE CS3_BASE
244#define NAND_PLAT_INIT() qong_nand_plat_init(nand)
245
246#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
247#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
248#define QONG_NAND_WRITE(addr, cmd) \
249 do { \
250 __REG8(addr) = cmd; \
251 } while (0)
252
253#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
254#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
255#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
256
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100257/*-----------------------------------------------------------------------
258 * FLASH and environment organization
259 */
260#define CONFIG_SYS_FLASH_BASE CS0_BASE
261#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
262/* max number of sectors on one chip */
263#define CONFIG_SYS_MAX_FLASH_SECT 1024
264/* Monitor at beginning of flash */
265#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
266#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
267
Fabio Estevam8a508e32011-10-21 07:03:54 +0000268#define CONFIG_ENV_IS_IN_FLASH
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100269#define CONFIG_ENV_SECT_SIZE 0x20000
270#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
Stefano Babicd7dc4642010-10-05 14:05:11 +0200271#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100272
273/* Address and size of Redundant Environment Sector */
274#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
275#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
276
277/*-----------------------------------------------------------------------
278 * CFI FLASH driver setup
279 */
280/* Flash memory is CFI compliant */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000281#define CONFIG_SYS_FLASH_CFI
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100282/* Use drivers/cfi_flash.c */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000283#define CONFIG_FLASH_CFI_DRIVER
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100284/* Use buffered writes (~10x faster) */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000285#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100286/* Use hardware sector protection */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000287#define CONFIG_SYS_FLASH_PROTECTION
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100288
289/*
Stefano Babicc9d944d2010-04-08 17:23:52 +0200290 * Filesystem
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100291 */
Stefano Babicc9d944d2010-04-08 17:23:52 +0200292#define CONFIG_CMD_JFFS2
293#define CONFIG_CMD_UBI
294#define CONFIG_CMD_UBIFS
295#define CONFIG_RBTREE
296#define CONFIG_MTD_PARTITIONS
Stefan Roese68d7d652009-03-19 13:30:36 +0100297#define CONFIG_CMD_MTDPARTS
Stefano Babicc9d944d2010-04-08 17:23:52 +0200298#define CONFIG_LZO
Stefan Roese942556a2009-05-12 14:32:58 +0200299#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
300#define CONFIG_FLASH_CFI_MTD
Wolfgang Denkb952c242010-10-19 11:10:06 +0200301#define MTDIDS_DEFAULT "nor0=physmap-flash.0," \
302 "nand0=gen_nand"
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100303#define MTDPARTS_DEFAULT \
Wolfgang Denkb952c242010-10-19 11:10:06 +0200304 "mtdparts=physmap-flash.0:" \
305 "512k(U-Boot),128k(env1),128k(env2)," \
306 "2304k(kernel),13m(ramdisk),-(user);" \
307 "gen_nand:" \
308 "128m(nand)"
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100309
Heiko Schochera784c012010-09-22 14:06:33 +0200310/* additions for new relocation code, must be added to all boards */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200311#define CONFIG_SYS_SDRAM_BASE 0x80000000
312#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
Wolfgang Denk553f0982010-10-26 13:32:32 +0200313#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200314#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Heiko Schochere48b7c02010-09-17 13:10:40 +0200315#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
316
Fabio Estevam8a508e32011-10-21 07:03:54 +0000317#define CONFIG_BOARD_EARLY_INIT_F
Heiko Schochere48b7c02010-09-17 13:10:40 +0200318
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100319#endif /* __CONFIG_H */