| Adam Ford | ab53bd4 | 2023-03-23 22:06:16 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks |
| 4 | */ |
| 5 | |
| 6 | #ifndef __IMX8MP_BEACON_H |
| 7 | #define __IMX8MP_BEACON_H |
| 8 | |
| 9 | #include <asm/arch/imx-regs.h> |
| 10 | |
| 11 | #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) |
| 12 | |
| 13 | #if defined(CONFIG_CMD_NET) |
| 14 | #define PHY_ANEG_TIMEOUT 20000 |
| 15 | #endif |
| 16 | |
| 17 | /* Link Definitions */ |
| 18 | |
| 19 | #define CFG_SYS_INIT_RAM_ADDR 0x40000000 |
| 20 | #define CFG_SYS_INIT_RAM_SIZE 0x80000 |
| 21 | |
| 22 | /* Totally 6GB DDR */ |
| 23 | #define CFG_SYS_SDRAM_BASE 0x40000000 |
| 24 | #define PHYS_SDRAM 0x40000000 |
| 25 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ |
| 26 | #define PHYS_SDRAM_2 0x100000000 |
| 27 | #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ |
| 28 | |
| 29 | #endif |