Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
Marcel Ziswiler | 535800d | 2019-04-09 17:24:15 +0200 | [diff] [blame] | 3 | * Copyright 2018-2019 Toradex AG |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 4 | * |
| 5 | * Configuration settings for the Colibri iMX6ULL module. |
| 6 | * |
| 7 | * based on colibri_imx7.h |
| 8 | */ |
| 9 | |
| 10 | #ifndef __COLIBRI_IMX6ULL_CONFIG_H |
| 11 | #define __COLIBRI_IMX6ULL_CONFIG_H |
| 12 | |
| 13 | #include "mx6_common.h" |
| 14 | #define CONFIG_IOMUX_LPSR |
| 15 | |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 16 | #define PHYS_SDRAM_SIZE SZ_512M |
| 17 | |
| 18 | /* Size of malloc() pool */ |
| 19 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) |
| 20 | |
| 21 | /* Network */ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 22 | #define CONFIG_IP_DEFRAG |
| 23 | #define CONFIG_TFTP_BLOCKSIZE 16352 |
| 24 | #define CONFIG_TFTP_TSIZE |
| 25 | |
| 26 | /* ENET1 */ |
| 27 | #define IMX_FEC_BASE ENET2_BASE_ADDR |
| 28 | |
Marcel Ziswiler | 535800d | 2019-04-09 17:24:15 +0200 | [diff] [blame] | 29 | /* MMC Config */ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 30 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 31 | #define CONFIG_SYS_FSL_USDHC_NUM 1 |
| 32 | |
| 33 | #undef CONFIG_BOOTM_PLAN9 |
| 34 | #undef CONFIG_BOOTM_RTEMS |
| 35 | |
| 36 | /* I2C configs */ |
| 37 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 38 | |
| 39 | #define CONFIG_IPADDR 192.168.10.2 |
| 40 | #define CONFIG_NETMASK 255.255.255.0 |
| 41 | #define CONFIG_SERVERIP 192.168.10.1 |
| 42 | |
| 43 | #define FDT_FILE "imx6ull-colibri${variant}-${fdt_board}.dtb" |
| 44 | |
| 45 | #define MEM_LAYOUT_ENV_SETTINGS \ |
| 46 | "bootm_size=0x10000000\0" \ |
Stefan Agner | ce30382 | 2019-04-09 17:24:10 +0200 | [diff] [blame] | 47 | "fdt_addr_r=0x82100000\0" \ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 48 | "fdt_high=0xffffffff\0" \ |
| 49 | "initrd_high=0xffffffff\0" \ |
| 50 | "kernel_addr_r=0x81000000\0" \ |
| 51 | "pxefile_addr_r=0x87100000\0" \ |
Stefan Agner | ce30382 | 2019-04-09 17:24:10 +0200 | [diff] [blame] | 52 | "ramdisk_addr_r=0x82200000\0" \ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 53 | "scriptaddr=0x87000000\0" |
| 54 | |
| 55 | #define NFS_BOOTCMD \ |
| 56 | "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ |
| 57 | "nfsboot=run setup; " \ |
| 58 | "setenv bootargs ${defargs} ${nfsargs} " \ |
| 59 | "${setupargs} ${vidargs}; echo Booting from NFS...;" \ |
| 60 | "dhcp ${kernel_addr_r} && " \ |
| 61 | "tftp ${fdt_addr_r} " FDT_FILE " && " \ |
| 62 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
| 63 | |
| 64 | #define SD_BOOTCMD \ |
| 65 | "sdargs=root=/dev/mmcblk0p2 ro rootwait\0" \ |
| 66 | "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ |
| 67 | "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ |
| 68 | "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ |
| 69 | "load mmc 0:1 ${fdt_addr_r} " FDT_FILE " && " \ |
| 70 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
| 71 | |
| 72 | #define UBI_BOOTCMD \ |
| 73 | "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \ |
| 74 | "ubi.fm_autoconvert=1\0" \ |
| 75 | "ubiboot=run setup; " \ |
| 76 | "setenv bootargs ${defargs} ${ubiargs} " \ |
| 77 | "${setupargs} ${vidargs}; echo Booting from NAND...; " \ |
| 78 | "ubi part ubi &&" \ |
| 79 | "ubi read ${kernel_addr_r} kernel && " \ |
| 80 | "ubi read ${fdt_addr_r} dtb && " \ |
| 81 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
| 82 | |
| 83 | #define CONFIG_BOOTCOMMAND "run ubiboot; " \ |
| 84 | "setenv fdtfile " FDT_FILE " && run distro_bootcmd;" |
| 85 | |
| 86 | #define BOOT_TARGET_DEVICES(func) \ |
| 87 | func(MMC, mmc, 0) \ |
| 88 | func(USB, usb, 0) \ |
| 89 | func(DHCP, dhcp, na) |
| 90 | #include <config_distro_bootcmd.h> |
| 91 | |
| 92 | #define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5" |
| 93 | |
| 94 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 95 | BOOTENV \ |
| 96 | MEM_LAYOUT_ENV_SETTINGS \ |
| 97 | NFS_BOOTCMD \ |
| 98 | SD_BOOTCMD \ |
| 99 | UBI_BOOTCMD \ |
| 100 | "console=ttymxc0\0" \ |
| 101 | "defargs=user_debug=30\0" \ |
| 102 | "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ |
| 103 | "fdt_board=eval-v3\0" \ |
| 104 | "fdt_fixup=;\0" \ |
| 105 | "ip_dyn=yes\0" \ |
| 106 | "kernel_file=zImage\0" \ |
Tom Rini | f0306a1 | 2018-07-23 10:51:13 -0400 | [diff] [blame] | 107 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 108 | "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ |
| 109 | "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ |
| 110 | "${board}/flash_eth.img && source ${loadaddr}\0" \ |
| 111 | "setsdupdate=mmc rescan && setenv interface mmc && " \ |
| 112 | "fatload ${interface} 0:1 ${loadaddr} " \ |
| 113 | "${board}/flash_blk.img && source ${loadaddr}\0" \ |
| 114 | "setup=setenv setupargs " \ |
| 115 | "console=tty1 console=${console}" \ |
| 116 | ",${baudrate}n8 ${memargs} consoleblank=0\0" \ |
| 117 | "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ |
| 118 | "setusbupdate=usb start && setenv interface usb && " \ |
| 119 | "fatload ${interface} 0:1 ${loadaddr} " \ |
| 120 | "${board}/flash_blk.img && source ${loadaddr}\0" \ |
| 121 | "splashpos=m,m\0" \ |
| 122 | "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ |
| 123 | "vidargs=video=mxsfb:640x480-16@60" |
| 124 | |
| 125 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| 126 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x08000000) |
| 127 | |
| 128 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 129 | |
| 130 | /* Physical Memory Map */ |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 131 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 132 | |
| 133 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 134 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 135 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 136 | |
| 137 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 138 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 139 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 140 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 141 | |
| 142 | #if defined(CONFIG_ENV_IS_IN_NAND) |
| 143 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 144 | #define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE) |
| 145 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 146 | #endif |
| 147 | |
| 148 | /* NAND stuff */ |
| 149 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 150 | /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */ |
| 151 | #define CONFIG_SYS_NAND_BASE -1 |
| 152 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 153 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 154 | |
Stefan Agner | 31b1e17 | 2018-05-30 19:01:48 +0200 | [diff] [blame] | 155 | /* USB Configs */ |
| 156 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 157 | |
| 158 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 159 | #define CONFIG_MXC_USB_FLAGS 0 |
| 160 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 161 | |
| 162 | #define CONFIG_IMX_THERMAL |
| 163 | |
| 164 | #define CONFIG_USBD_HS |
| 165 | |
| 166 | /* USB Device Firmware Update support */ |
| 167 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M |
| 168 | #define DFU_DEFAULT_POLL_TIMEOUT 300 |
| 169 | |
| 170 | #ifdef CONFIG_VIDEO |
| 171 | #define CONFIG_VIDEO_MXS |
| 172 | #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR |
| 173 | #define CONFIG_VIDEO_LOGO |
| 174 | #define CONFIG_SPLASH_SCREEN |
| 175 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 176 | #define CONFIG_BMP_16BPP |
| 177 | #define CONFIG_VIDEO_BMP_RLE8 |
| 178 | #define CONFIG_VIDEO_BMP_LOGO |
| 179 | #endif |
| 180 | |
Marcel Ziswiler | 535800d | 2019-04-09 17:24:15 +0200 | [diff] [blame] | 181 | #endif /* __COLIBRI_IMX6ULL_CONFIG_H */ |