Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 1 | /* |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 2 | * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com> |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef __FSL_NFC_H |
| 24 | #define __FSL_NFC_H |
| 25 | |
| 26 | /* |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 27 | * Register map and bit definitions for the Freescale NAND Flash Controller |
| 28 | * present in various i.MX devices. |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 29 | * |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 30 | * MX31 and MX27 have version 1, which has: |
| 31 | * 4 512-byte main buffers and |
| 32 | * 4 16-byte spare buffers |
| 33 | * to support up to 2K byte pagesize nand. |
| 34 | * Reading or writing a 2K page requires 4 FDI/FDO cycles. |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 35 | * |
Benoît Thébaudeau | 9c60e75 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 36 | * MX25 and MX35 have version 2.1, which has: |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 37 | * 8 512-byte main buffers and |
| 38 | * 8 64-byte spare buffers |
| 39 | * to support up to 4K byte pagesize nand. |
| 40 | * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle. |
| 41 | * Also some of registers are moved and/or changed meaning as seen below. |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 42 | */ |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 43 | #if defined(CONFIG_MX27) || defined(CONFIG_MX31) |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 44 | #define MXC_NFC_V1 |
Benoît Thébaudeau | 9c60e75 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 45 | #define is_mxc_nfc_1() 1 |
| 46 | #define is_mxc_nfc_21() 0 |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 47 | #elif defined(CONFIG_MX25) || defined(CONFIG_MX35) |
Benoît Thébaudeau | 9c60e75 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 48 | #define MXC_NFC_V2_1 |
| 49 | #define is_mxc_nfc_1() 0 |
| 50 | #define is_mxc_nfc_21() 1 |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 51 | #else |
Benoît Thébaudeau | 1884d65 | 2012-08-13 22:50:42 +0200 | [diff] [blame] | 52 | #error "MXC NFC implementation not supported" |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 53 | #endif |
| 54 | |
| 55 | #if defined(MXC_NFC_V1) |
| 56 | #define NAND_MXC_NR_BUFS 4 |
| 57 | #define NAND_MXC_SPARE_BUF_SIZE 16 |
| 58 | #define NAND_MXC_REG_OFFSET 0xe00 |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 59 | #define NAND_MXC_2K_MULTI_CYCLE |
Benoît Thébaudeau | 9c60e75 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 60 | #elif defined(MXC_NFC_V2_1) |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 61 | #define NAND_MXC_NR_BUFS 8 |
| 62 | #define NAND_MXC_SPARE_BUF_SIZE 64 |
| 63 | #define NAND_MXC_REG_OFFSET 0x1e00 |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 64 | #endif |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 65 | |
| 66 | struct fsl_nfc_regs { |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 67 | u8 main_area[NAND_MXC_NR_BUFS][0x200]; |
| 68 | u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE]; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 69 | /* |
| 70 | * reserved size is offset of nfc registers |
| 71 | * minus total main and spare sizes |
| 72 | */ |
| 73 | u8 reserved1[NAND_MXC_REG_OFFSET |
| 74 | - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)]; |
| 75 | #if defined(MXC_NFC_V1) |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 76 | u16 buf_size; |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 77 | u16 reserved2; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 78 | u16 buf_addr; |
| 79 | u16 flash_addr; |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 80 | u16 flash_cmd; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 81 | u16 config; |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 82 | u16 ecc_status_result; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 83 | u16 rsltmain_area; |
| 84 | u16 rsltspare_area; |
| 85 | u16 wrprot; |
| 86 | u16 unlockstart_blkaddr; |
| 87 | u16 unlockend_blkaddr; |
| 88 | u16 nf_wrprst; |
| 89 | u16 config1; |
| 90 | u16 config2; |
Benoît Thébaudeau | 9c60e75 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 91 | #elif defined(MXC_NFC_V2_1) |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 92 | u16 reserved2[2]; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 93 | u16 buf_addr; |
| 94 | u16 flash_addr; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 95 | u16 flash_cmd; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 96 | u16 config; |
Benoît Thébaudeau | c1db8dd | 2012-08-13 22:49:42 +0200 | [diff] [blame] | 97 | u32 ecc_status_result; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 98 | u16 spare_area_size; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 99 | u16 wrprot; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 100 | u16 reserved3[2]; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 101 | u16 nf_wrprst; |
| 102 | u16 config1; |
| 103 | u16 config2; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 104 | u16 reserved4; |
Benoît Thébaudeau | 80c8ab7 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 105 | u16 unlockstart_blkaddr; |
| 106 | u16 unlockend_blkaddr; |
| 107 | u16 unlockstart_blkaddr1; |
| 108 | u16 unlockend_blkaddr1; |
| 109 | u16 unlockstart_blkaddr2; |
| 110 | u16 unlockend_blkaddr2; |
| 111 | u16 unlockstart_blkaddr3; |
| 112 | u16 unlockend_blkaddr3; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 113 | #endif |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 114 | }; |
| 115 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 116 | /* Set FCMD to 1, rest to 0 for Command operation */ |
| 117 | #define NFC_CMD 0x1 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 118 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 119 | /* Set FADD to 1, rest to 0 for Address operation */ |
| 120 | #define NFC_ADDR 0x2 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 121 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 122 | /* Set FDI to 1, rest to 0 for Input operation */ |
| 123 | #define NFC_INPUT 0x4 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 124 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 125 | /* Set FDO to 001, rest to 0 for Data Output operation */ |
| 126 | #define NFC_OUTPUT 0x8 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 127 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 128 | /* Set FDO to 010, rest to 0 for Read ID operation */ |
| 129 | #define NFC_ID 0x10 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 130 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 131 | /* Set FDO to 100, rest to 0 for Read Status operation */ |
| 132 | #define NFC_STATUS 0x20 |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 133 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 134 | #define NFC_CONFIG1_SP_EN (1 << 2) |
| 135 | #define NFC_CONFIG1_RST (1 << 6) |
| 136 | #define NFC_CONFIG1_CE (1 << 7) |
| 137 | #define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3) |
| 138 | #define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4) |
| 139 | #define NFC_V1_V2_CONFIG1_BIG (1 << 5) |
| 140 | #define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0) |
| 141 | #define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8) |
| 142 | #define NFC_V2_CONFIG1_FP_INT (1 << 11) |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 143 | |
Benoît Thébaudeau | 2dc0aa0 | 2013-04-11 09:35:36 +0000 | [diff] [blame^] | 144 | #define NFC_V1_V2_CONFIG2_INT (1 << 15) |
| 145 | |
| 146 | #define operation config2 |
| 147 | #define readnfc readw |
| 148 | #define writenfc writew |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 149 | |
| 150 | #endif /* __FSL_NFC_H */ |