Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 1 | /* |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 2 | * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com> |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef __FSL_NFC_H |
| 24 | #define __FSL_NFC_H |
| 25 | |
| 26 | /* |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 27 | * TODO: Use same register defs for nand_spl mxc nand driver |
| 28 | * and mtd mxc nand driver. |
| 29 | * |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 30 | * Register map and bit definitions for the Freescale NAND Flash |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 31 | * Controller present in various i.MX devices. |
| 32 | * |
| 33 | * MX31 and MX27 have version 1 which has |
| 34 | * 4 512 byte main buffers and |
| 35 | * 4 16 byte spare buffers |
| 36 | * to support up to 2K byte pagesize nand. |
| 37 | * Reading or writing a 2K page requires 4 FDI/FDO cycles. |
| 38 | * |
| 39 | * MX25 has version 1.1 which has |
| 40 | * 8 512 byte main buffers and |
| 41 | * 8 64 byte spare buffers |
| 42 | * to support up to 4K byte pagesize nand. |
| 43 | * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle. |
| 44 | * Also some of registers are moved and/or changed meaning as seen below. |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 45 | */ |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 46 | #if defined(CONFIG_MX31) || defined(CONFIG_MX27) |
| 47 | #define MXC_NFC_V1 |
| 48 | #elif defined(CONFIG_MX25) |
| 49 | #define MXC_NFC_V1_1 |
| 50 | #else |
| 51 | #warning "MXC NFC version not defined" |
| 52 | #endif |
| 53 | |
| 54 | #if defined(MXC_NFC_V1) |
| 55 | #define NAND_MXC_NR_BUFS 4 |
| 56 | #define NAND_MXC_SPARE_BUF_SIZE 16 |
| 57 | #define NAND_MXC_REG_OFFSET 0xe00 |
| 58 | #define NAND_MXC_2K_MULTI_CYCLE 1 |
| 59 | #elif defined(MXC_NFC_V1_1) |
| 60 | #define NAND_MXC_NR_BUFS 8 |
| 61 | #define NAND_MXC_SPARE_BUF_SIZE 64 |
| 62 | #define NAND_MXC_REG_OFFSET 0x1e00 |
| 63 | #else |
| 64 | #error "define CONFIG_NAND_MXC_VXXX to use the mxc spl_nand driver" |
| 65 | #endif |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 66 | |
| 67 | struct fsl_nfc_regs { |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 68 | u32 main_area[NAND_MXC_NR_BUFS][512/4]; |
| 69 | u32 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE/4]; |
| 70 | /* |
| 71 | * reserved size is offset of nfc registers |
| 72 | * minus total main and spare sizes |
| 73 | */ |
| 74 | u8 reserved1[NAND_MXC_REG_OFFSET |
| 75 | - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)]; |
| 76 | #if defined(MXC_NFC_V1) |
| 77 | u16 bufsiz; |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 78 | u16 reserved2; |
| 79 | u16 buffer_address; |
| 80 | u16 flash_add; |
| 81 | u16 flash_cmd; |
| 82 | u16 configuration; |
| 83 | u16 ecc_status_result; |
| 84 | u16 ecc_rslt_main_area; |
| 85 | u16 ecc_rslt_spare_area; |
| 86 | u16 nf_wr_prot; |
| 87 | u16 unlock_start_blk_add; |
| 88 | u16 unlock_end_blk_add; |
| 89 | u16 nand_flash_wr_pr_st; |
| 90 | u16 nand_flash_config1; |
| 91 | u16 nand_flash_config2; |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 92 | #elif defined(MXC_NFC_V1_1) |
| 93 | u16 reserved2[2]; |
| 94 | u16 buffer_address; |
| 95 | u16 flash_add; |
| 96 | u16 flash_cmd; |
| 97 | u16 configuration; |
| 98 | u16 ecc_status_result; |
| 99 | u16 ecc_status_result2; |
| 100 | u16 spare_area_size; |
| 101 | u16 nf_wr_prot; |
| 102 | u16 reserved3[2]; |
| 103 | u16 nand_flash_wr_pr_st; |
| 104 | u16 nand_flash_config1; |
| 105 | u16 nand_flash_config2; |
| 106 | u16 reserved4; |
| 107 | u16 unlock_start_blk_add0; |
| 108 | u16 unlock_end_blk_add0; |
| 109 | u16 unlock_start_blk_add1; |
| 110 | u16 unlock_end_blk_add1; |
| 111 | u16 unlock_start_blk_add2; |
| 112 | u16 unlock_end_blk_add2; |
| 113 | u16 unlock_start_blk_add3; |
| 114 | u16 unlock_end_blk_add3; |
| 115 | #endif |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 116 | }; |
| 117 | |
| 118 | /* |
| 119 | * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command |
| 120 | * operation |
| 121 | */ |
| 122 | #define NFC_CMD 0x1 |
| 123 | |
| 124 | /* |
| 125 | * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address |
| 126 | * operation |
| 127 | */ |
| 128 | #define NFC_ADDR 0x2 |
| 129 | |
| 130 | /* |
| 131 | * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input |
| 132 | * operation |
| 133 | */ |
| 134 | #define NFC_INPUT 0x4 |
| 135 | |
| 136 | /* |
| 137 | * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data |
| 138 | * Output operation |
| 139 | */ |
| 140 | #define NFC_OUTPUT 0x8 |
| 141 | |
| 142 | /* |
| 143 | * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID |
| 144 | * operation |
| 145 | */ |
| 146 | #define NFC_ID 0x10 |
| 147 | |
| 148 | /* |
| 149 | * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read |
| 150 | * Status operation |
| 151 | */ |
| 152 | #define NFC_STATUS 0x20 |
| 153 | |
| 154 | /* |
| 155 | * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status |
| 156 | * operation |
| 157 | */ |
| 158 | #define NFC_INT 0x8000 |
| 159 | |
John Rigby | f3bb63a | 2010-01-26 19:24:17 -0700 | [diff] [blame^] | 160 | #ifdef MXC_NFC_V1_1 |
| 161 | #define NFC_4_8N_ECC (1 << 0) |
| 162 | #endif |
Magnus Lilja | 40c642b | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 163 | #define NFC_SP_EN (1 << 2) |
| 164 | #define NFC_ECC_EN (1 << 3) |
| 165 | #define NFC_INT_MSK (1 << 4) |
| 166 | #define NFC_BIG (1 << 5) |
| 167 | #define NFC_RST (1 << 6) |
| 168 | #define NFC_CE (1 << 7) |
| 169 | #define NFC_ONE_CYCLE (1 << 8) |
| 170 | |
| 171 | #endif /* __FSL_NFC_H */ |