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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ian Campbell643cf0e2014-05-05 11:52:23 +01002/*
3 * (C) Copyright 2007-2011
4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
Ian Campbell643cf0e2014-05-05 11:52:23 +01006 */
7
8#include <common.h>
Simon Glass691d7192020-05-10 11:40:02 -06009#include <init.h>
Simon Glass10453152019-11-14 12:57:30 -070010#include <time.h>
Simon Glass401d1c42020-10-30 21:38:53 -060011#include <asm/global_data.h>
Ian Campbell643cf0e2014-05-05 11:52:23 +010012#include <asm/io.h>
13#include <asm/arch/timer.h>
Simon Glassc05ed002020-05-10 11:40:11 -060014#include <linux/delay.h>
Ian Campbell643cf0e2014-05-05 11:52:23 +010015
16DECLARE_GLOBAL_DATA_PTR;
17
18#define TIMER_MODE (0x0 << 7) /* continuous mode */
19#define TIMER_DIV (0x0 << 4) /* pre scale 1 */
20#define TIMER_SRC (0x1 << 2) /* osc24m */
21#define TIMER_RELOAD (0x1 << 1) /* reload internal value */
22#define TIMER_EN (0x1 << 0) /* enable timer */
23
24#define TIMER_CLOCK (24 * 1000 * 1000)
25#define COUNT_TO_USEC(x) ((x) / 24)
26#define USEC_TO_COUNT(x) ((x) * 24)
27#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
28#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
29
30#define TIMER_LOAD_VAL 0xffffffff
31
32#define TIMER_NUM 0 /* we use timer 0 */
33
34/* read the 32-bit timer */
35static ulong read_timer(void)
36{
37 struct sunxi_timer_reg *timers =
38 (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
39 struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
40
41 /*
42 * The hardware timer counts down, therefore we invert to
43 * produce an incrementing timer.
44 */
45 return ~readl(&timer->val);
46}
47
48/* init timer register */
49int timer_init(void)
50{
51 struct sunxi_timer_reg *timers =
52 (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
53 struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
Jesse Taube0d4377f2022-01-29 10:23:01 -050054
Ian Campbell643cf0e2014-05-05 11:52:23 +010055 writel(TIMER_LOAD_VAL, &timer->inter);
56 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
57 &timer->ctl);
58
59 return 0;
60}
61
Patrick Delaunay6180ea72018-10-05 11:33:52 +020062static ulong get_timer_masked(void)
Ian Campbell643cf0e2014-05-05 11:52:23 +010063{
64 /* current tick value */
65 ulong now = TICKS_TO_HZ(read_timer());
66
Jesse Taube0d4377f2022-01-29 10:23:01 -050067 if (now >= gd->arch.lastinc) { /* normal (non rollover) */
Ian Campbell643cf0e2014-05-05 11:52:23 +010068 gd->arch.tbl += (now - gd->arch.lastinc);
Jesse Taube0d4377f2022-01-29 10:23:01 -050069 } else {
Ian Campbell643cf0e2014-05-05 11:52:23 +010070 /* rollover */
71 gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
72 - gd->arch.lastinc) + now;
73 }
74 gd->arch.lastinc = now;
75
76 return gd->arch.tbl;
77}
78
Jesse Taube0d4377f2022-01-29 10:23:01 -050079/* timer without interrupts */
Patrick Delaunay6180ea72018-10-05 11:33:52 +020080ulong get_timer(ulong base)
81{
82 return get_timer_masked() - base;
83}
84
Ian Campbell643cf0e2014-05-05 11:52:23 +010085/* delay x useconds */
86void __udelay(unsigned long usec)
87{
88 long tmo = USEC_TO_COUNT(usec);
89 ulong now, last = read_timer();
90
91 while (tmo > 0) {
92 now = read_timer();
93 if (now > last) /* normal (non rollover) */
94 tmo -= now - last;
95 else /* rollover */
96 tmo -= TIMER_LOAD_VAL - last + now;
97 last = now;
98 }
99}
100
101/*
102 * This function is derived from PowerPC code (read timebase as long long).
103 * On ARM it just returns the timer value.
104 */
105unsigned long long get_ticks(void)
106{
107 return get_timer(0);
108}
109
110/*
111 * This function is derived from PowerPC code (timebase clock frequency).
112 * On ARM it returns the number of timer ticks per second.
113 */
114ulong get_tbclk(void)
115{
116 return CONFIG_SYS_HZ;
117}