Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 3581811dc26fdf9eef05a7de9f654dc6a7a2596a / . / arch / riscv / dts / k210.dtsi
blob: 2546c7d4e0d5d92391d886dff1a74dccdf254f91 [file] [log] [blame]
Sean Andersonbba86182020-06-24 06:41:23 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 */
5
6#include <dt-bindings/clock/k210-sysctl.h>
7#include <dt-bindings/mfd/k210-sysctl.h>
8#include <dt-bindings/reset/k210-sysctl.h>
9
10/ {
11 /*
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13 * wide, and the upper half of all addresses is ignored.
14 */
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "kendryte,k210";
18
19 aliases {
20 dma0 = &dmac0;
21 gpio0 = &gpio0;
22 gpio1 = &gpio1_0;
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 pinctrl0 = &fpioa;
27 serial0 = &uarths0;
28 serial1 = &uart1;
29 serial2 = &uart2;
30 serial3 = &uart3;
31 spi0 = &spi0;
32 spi1 = &spi1;
33 spi2 = &spi2;
34 spi3 = &spi3;
35 timer0 = &timer0;
36 timer1 = &timer1;
37 timer2 = &timer2;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 timebase-frequency = <7800000>;
44 cpu0: cpu@0 {
45 device_type = "cpu";
46 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
47 reg = <0>;
48 riscv,isa = "rv64imafdgc";
49 mmu-type = "sv39";
50 i-cache-block-size = <64>;
51 i-cache-size = <0x8000>;
52 d-cache-block-size = <64>;
53 d-cache-size = <0x8000>;
54 clocks = <&sysclk K210_CLK_CPU>;
55 cpu0_intc: interrupt-controller {
56 #interrupt-cells = <1>;
57 interrupt-controller;
58 compatible = "riscv,cpu-intc";
59 };
60 };
61 cpu1: cpu@1 {
62 device_type = "cpu";
63 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
64 reg = <1>;
65 riscv,isa = "rv64imafdgc";
66 mmu-type = "sv39";
67 i-cache-block-size = <64>;
68 i-cache-size = <0x8000>;
69 d-cache-block-size = <64>;
70 d-cache-size = <0x8000>;
71 clocks = <&sysclk K210_CLK_CPU>;
72 cpu1_intc: interrupt-controller {
73 #interrupt-cells = <1>;
74 interrupt-controller;
75 compatible = "riscv,cpu-intc";
76 };
77 };
78 };
79
80 sram: memory@80000000 {
81 device_type = "memory";
82 compatible = "kendryte,k210-sram";
83 reg = <0x80000000 0x400000>,
84 <0x80400000 0x200000>,
85 <0x80600000 0x200000>;
86 reg-names = "sram0", "sram1", "airam";
87 clocks = <&sysclk K210_CLK_SRAM0>,
88 <&sysclk K210_CLK_SRAM1>,
89 <&sysclk K210_CLK_PLL1>;
90 clock-names = "sram0", "sram1", "airam";
91 };
92
93 reserved-memory {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 ranges;
97
98 ai_reserved: ai@80600000 {
99 reg = <0x80600000 0x200000>;
100 reusable;
101 };
102 };
103
104 clocks {
105 in0: osc {
106 compatible = "fixed-clock";
107 #clock-cells = <0>;
108 clock-frequency = <26000000>;
109 };
110 };
111
112 soc {
113 #address-cells = <1>;
114 #size-cells = <1>;
115 compatible = "kendryte,k210-soc", "simple-bus";
116 ranges;
117 interrupt-parent = <&plic0>;
118
119 debug0: debug@0 {
120 compatible = "kendryte,k210-debug", "riscv,debug";
121 reg = <0x0 0x1000>;
122 };
123
124 rom0: nvmem@1000 {
125 reg = <0x1000 0x1000>;
126 read-only;
127 };
128
129 clint0: interrupt-controller@2000000 {
130 #interrupt-cells = <1>;
131 compatible = "kendryte,k210-clint", "riscv,clint0";
132 reg = <0x2000000 0xC000>;
133 interrupt-controller;
134 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
135 <&cpu1_intc 3>, <&cpu1_intc 7>;
136 clocks = <&sysclk K210_CLK_CPU>;
137 };
138
139 plic0: interrupt-controller@C000000 {
140 #interrupt-cells = <1>;
141 compatible = "kendryte,k210-plic", "riscv,plic0";
142 reg = <0xC000000 0x4000000>;
143 interrupt-controller;
144 interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
145 <&cpu1_intc 9>, <&cpu1_intc 11>;
146 riscv,ndev = <65>;
147 riscv,max-priority = <7>;
148 };
149
150 uarths0: serial@38000000 {
151 compatible = "kendryte,k210-uarths", "sifive,uart0";
152 reg = <0x38000000 0x1000>;
153 interrupts = <33>;
154 clocks = <&sysclk K210_CLK_CPU>;
155 status = "disabled";
156 };
157
158 gpio0: gpio-controller@38001000 {
159 #interrupt-cells = <2>;
160 #gpio-cells = <2>;
161 compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
162 reg = <0x38001000 0x1000>;
163 interrupt-controller;
164 interrupts = <34 35 36 37 38 39 40 41
165 42 43 44 45 46 47 48 49
166 50 51 52 53 54 55 56 57
167 58 59 60 61 62 63 64 65>;
168 gpio-controller;
169 ngpios = <32>;
170 status = "disabled";
171 };
172
173 kpu0: kpu@40800000 {
174 compatible = "kendryte,k210-kpu";
175 reg = <0x40800000 0xc00000>;
176 interrupts = <25>;
177 clocks = <&sysclk K210_CLK_AI>;
178 memory-region = <&ai_reserved>;
179 status = "disabled";
180 };
181
182 fft0: fft@42000000 {
183 compatible = "kendryte,k210-fft";
184 reg = <0x42000000 0x400000>;
185 interrupts = <26>;
186 clocks = <&sysclk K210_CLK_FFT>;
187 resets = <&sysrst K210_RST_FFT>;
188 status = "disabled";
189 };
190
191 dmac0: dma-controller@50000000 {
192 compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
193 reg = <0x50000000 0x1000>;
194 interrupts = <27 28 29 30 31 32>;
195 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
196 clock-names = "core-clk", "cfgr-clk";
197 resets = <&sysrst K210_RST_DMA>;
198 dma-channels = <6>;
199 snps,dma-masters = <2>;
200 snps,data-width = <5>;
201 snps,block-size = <0x400000 0x400000 0x400000
202 0x400000 0x400000 0x400000>;
203 snps,axi-max-burst-len = <256>;
204 status = "disabled";
205 };
206
207 apb0: bus@50200000 {
208 #address-cells = <1>;
209 #size-cells = <1>;
210 compatible = "kendryte,k210-apb", "simple-pm-bus";
211 ranges;
212 clocks = <&sysclk K210_CLK_APB0>;
213
214 gpio1: gpio-controller@50200000 {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "kendryte,k210-gpio",
218 "snps,dw-apb-gpio";
219 reg = <0x50200000 0x80>;
220 clocks = <&sysclk K210_CLK_GPIO>;
221 resets = <&sysrst K210_RST_GPIO>;
222 status = "disabled";
223
224 gpio1_0: gpio1@0 {
225 #gpio-cells = <2>;
226 #interrupt-cells = <2>;
227 compatible = "snps,dw-apb-gpio-port";
228 reg = <0>;
229 interrupt-controller;
230 interrupts = <23>;
231 gpio-controller;
232 snps,nr-gpios = <8>;
233 };
234 };
235
236 uart1: serial@50210000 {
237 compatible = "kendryte,k210-uart",
238 "snps,dw-apb-uart";
239 reg = <0x50210000 0x100>;
240 interrupts = <11>;
241 clocks = <&sysclk K210_CLK_UART1>;
242 resets = <&sysrst K210_RST_UART1>;
243 reg-io-width = <4>;
244 reg-shift = <2>;
245 dcd-override;
246 dsr-override;
247 cts-override;
248 ri-override;
249 status = "disabled";
250 };
251
252 uart2: serial@50220000 {
253 compatible = "kendryte,k210-uart",
254 "snps,dw-apb-uart";
255 reg = <0x50220000 0x100>;
256 interrupts = <12>;
257 clocks = <&sysclk K210_CLK_UART2>;
258 resets = <&sysrst K210_RST_UART2>;
259 reg-io-width = <4>;
260 reg-shift = <2>;
261 dcd-override;
262 dsr-override;
263 cts-override;
264 ri-override;
265 status = "disabled";
266 };
267
268 uart3: serial@50230000 {
269 compatible = "kendryte,k210-uart",
270 "snps,dw-apb-uart";
271 reg = <0x50230000 0x100>;
272 interrupts = <13>;
273 clocks = <&sysclk K210_CLK_UART3>;
274 resets = <&sysrst K210_RST_UART3>;
275 reg-io-width = <4>;
276 reg-shift = <2>;
277 dcd-override;
278 dsr-override;
279 cts-override;
280 ri-override;
281 status = "disabled";
282 };
283
284 spi2: spi@50240000 {
285 compatible = "kendryte,k120-spislave",
286 "snps,dw-apb-ssi";
287 spi-slave;
288 reg = <0x50240000 0x100>;
289 interrupts = <2>;
290 clocks = <&sysclk K210_CLK_SPI2>;
291 resets = <&sysrst K210_RST_SPI2>;
292 spi-max-frequency = <25000000>;
293 status = "disabled";
294 };
295
296 i2s0: i2s@50250000 {
297 compatible = "kendryte,k210-i2s",
298 "snps,designware-i2s";
299 reg = <0x50250000 0x200>;
300 interrupts = <5>;
301 clocks = <&sysclk K210_CLK_I2S0>;
302 clock-names = "i2sclk";
303 resets = <&sysrst K210_RST_I2S0>;
304 status = "disabled";
305 };
306
307 apu0: sound@520250200 {
308 compatible = "kendryte,k210-apu";
309 reg = <0x50250200 0x200>;
310 status = "disabled";
311 };
312
313 i2s1: i2s@50260000 {
314 compatible = "kendryte,k210-i2s",
315 "snps,designware-i2s";
316 reg = <0x50260000 0x200>;
317 interrupts = <6>;
318 clocks = <&sysclk K210_CLK_I2S1>;
319 clock-names = "i2sclk";
320 resets = <&sysrst K210_RST_I2S1>;
321 status = "disabled";
322 };
323
324 i2s2: i2s@50270000 {
325 compatible = "kendryte,k210-i2s",
326 "snps,designware-i2s";
327 reg = <0x50270000 0x200>;
328 interrupts = <7>;
329 clocks = <&sysclk K210_CLK_I2S2>;
330 clock-names = "i2sclk";
331 resets = <&sysrst K210_RST_I2S2>;
332 status = "disabled";
333 };
334
335 i2c0: i2c@50280000 {
336 compatible = "kendryte,k210-i2c",
337 "snps,designware-i2c";
338 reg = <0x50280000 0x100>;
339 interrupts = <8>;
340 clocks = <&sysclk K210_CLK_I2C0>;
341 resets = <&sysrst K210_RST_I2C0>;
342 status = "disabled";
343 };
344
345 i2c1: i2c@50290000 {
346 compatible = "kendryte,k210-i2c",
347 "snps,designware-i2c";
348 reg = <0x50290000 0x100>;
349 interrupts = <9>;
350 clocks = <&sysclk K210_CLK_I2C1>;
351 resets = <&sysrst K210_RST_I2C1>;
352 status = "disabled";
353 };
354
355 i2c2: i2c@502A0000 {
356 compatible = "kendryte,k210-i2c",
357 "snps,designware-i2c";
358 reg = <0x502A0000 0x100>;
359 interrupts = <10>;
360 clocks = <&sysclk K210_CLK_I2C2>;
361 resets = <&sysrst K210_RST_I2C2>;
362 status = "disabled";
363 };
364
365 fpioa: pinmux@502B0000 {
366 compatible = "kendryte,k210-fpioa";
367 reg = <0x502B0000 0x100>;
368 clocks = <&sysclk K210_CLK_FPIOA>;
369 resets = <&sysrst K210_RST_FPIOA>;
370 status = "disabled";
371 };
372
373 sha256: sha256@502C0000 {
374 compatible = "kendryte,k210-sha256";
375 reg = <0x502C0000 0x100>;
376 clocks = <&sysclk K210_CLK_SHA>;
377 resets = <&sysrst K210_RST_SHA>;
378 status = "disabled";
379 };
380
381 timer0: timer@502D0000 {
382 compatible = "kendryte,k210-timer",
383 "snps,dw-apb-timer";
384 reg = <0x502D0000 0x100>;
385 interrupts = <14 15>;
386 clocks = <&sysclk K210_CLK_TIMER0>;
387 clock-names = "timer";
388 resets = <&sysrst K210_RST_TIMER0>;
389 status = "disabled";
390 };
391
392 timer1: timer@502E0000 {
393 compatible = "kendryte,k210-timer",
394 "snps,dw-apb-timer";
395 reg = <0x502E0000 0x100>;
396 interrupts = <16 17>;
397 clocks = <&sysclk K210_CLK_TIMER1>;
398 clock-names = "timer";
399 resets = <&sysrst K210_RST_TIMER1>;
400 status = "disabled";
401 };
402
403 timer2: timer@502F0000 {
404 compatible = "kendryte,k210-timer",
405 "snps,dw-apb-timer";
406 reg = <0x502F0000 0x100>;
407 interrupts = <18 19>;
408 clocks = <&sysclk K210_CLK_TIMER2>;
409 clock-names = "timer";
410 resets = <&sysrst K210_RST_TIMER2>;
411 status = "disabled";
412 };
413 };
414
415 apb1: bus@50400000 {
416 #address-cells = <1>;
417 #size-cells = <1>;
418 compatible = "kendryte,k210-apb", "simple-pm-bus";
419 ranges;
420 clocks = <&sysclk K210_CLK_APB1>;
421
422 wdt0: watchdog@50400000 {
423 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
424 reg = <0x50400000 0x100>;
425 interrupts = <21>;
426 clocks = <&sysclk K210_CLK_WDT0>;
427 resets = <&sysrst K210_RST_WDT0>;
428 status = "disabled";
429 };
430
431 wdt1: watchdog@50410000 {
432 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
433 reg = <0x50410000 0x100>;
434 interrupts = <22>;
435 clocks = <&sysclk K210_CLK_WDT1>;
436 resets = <&sysrst K210_RST_WDT1>;
437 status = "disabled";
438 };
439
440 otp0: nvmem@50420000 {
441 #address-cells = <1>;
442 #size-cells = <1>;
443 compatible = "kendryte,k210-otp";
444 reg = <0x50420000 0x100>,
445 <0x88000000 0x20000>;
446 reg-names = "reg", "mem";
447 clocks = <&sysclk K210_CLK_ROM>;
448 resets = <&sysrst K210_RST_ROM>;
449 read-only;
450 status = "disabled";
451
452 /* Bootloader */
453 firmware@00000 {
454 reg = <0x00000 0xC200>;
455 };
456
457 /*
458 * config string as described in RISC-V
459 * privileged spec 1.9
460 */
461 config-1-9@1c000 {
462 reg = <0x1C000 0x1000>;
463 };
464
465 /*
466 * Device tree containing only registers,
467 * interrupts, and cpus
468 */
469 fdt@1d000 {
470 reg = <0x1D000 0x2000>;
471 };
472
473 /* CPU/ROM credits */
474 credits@1f000 {
475 reg = <0x1F000 0x1000>;
476 };
477 };
478
479 dvp0: camera@50430000 {
480 compatible = "kendryte,k210-dvp";
481 reg = <0x50430000 0x100>;
482 interrupts = <24>;
483 clocks = <&sysclk K210_CLK_DVP>;
484 resets = <&sysrst K210_RST_DVP>;
485 status = "disabled";
486 };
487
488 sysctl: syscon@50440000 {
489 compatible = "kendryte,k210-sysctl",
490 "syscon", "simple-mfd";
491 reg = <0x50440000 0x100>;
492 reg-io-width = <4>;
493
494 sysclk: clock-controller {
495 #clock-cells = <1>;
496 compatible = "kendryte,k210-clk";
497 clocks = <&in0>;
498 };
499
500 sysrst: reset-controller {
501 compatible = "kendryte,k210-rst",
502 "syscon-reset";
503 #reset-cells = <1>;
504 regmap = <&sysctl>;
505 offset = <K210_SYSCTL_PERI_RESET>;
506 mask = <0x27FFFFFF>;
507 assert-high = <1>;
508 };
509
510 reboot {
511 compatible = "syscon-reboot";
512 regmap = <&sysctl>;
513 offset = <K210_SYSCTL_SOFT_RESET>;
514 mask = <1>;
515 value = <1>;
516 };
517 };
518
519 aes0: aes@50450000 {
520 compatible = "kendryte,k210-aes";
521 reg = <0x50450000 0x100>;
522 clocks = <&sysclk K210_CLK_AES>;
523 resets = <&sysrst K210_RST_AES>;
524 status = "disabled";
525 };
526
527 rtc: rtc@50460000 {
528 compatible = "kendryte,k210-rtc";
529 reg = <0x50460000 0x100>;
530 clocks = <&in0>;
531 resets = <&sysrst K210_RST_RTC>;
532 interrupts = <20>;
533 status = "disabled";
534 };
535 };
536
537 apb2: bus@52000000 {
538 #address-cells = <1>;
539 #size-cells = <1>;
540 compatible = "kendryte,k210-apb", "simple-pm-bus";
541 ranges;
542 clocks = <&sysclk K210_CLK_APB2>;
543
544 spi0: spi@52000000 {
545 #address-cells = <1>;
546 #size-cells = <0>;
547 compatible = "kendryte,k210-spi",
548 "snps,dw-apb-ssi";
549 reg = <0x52000000 0x100>;
550 interrupts = <1>;
551 clocks = <&sysclk K210_CLK_SPI0>;
552 clock-names = "ssi_clk";
553 resets = <&sysrst K210_RST_SPI0>;
554 spi-max-frequency = <25000000>;
555 num-cs = <4>;
556 reg-io-width = <4>;
557 status = "disabled";
558 };
559
560 spi1: spi@53000000 {
561 #address-cells = <1>;
562 #size-cells = <0>;
563 compatible = "kendryte,k210-spi",
564 "snps,dw-apb-ssi";
565 reg = <0x53000000 0x100>;
566 interrupts = <2>;
567 clocks = <&sysclk K210_CLK_SPI1>;
568 clock-names = "ssi_clk";
569 resets = <&sysrst K210_RST_SPI1>;
570 spi-max-frequency = <25000000>;
571 num-cs = <4>;
572 reg-io-width = <4>;
573 status = "disabled";
574 };
575
576 spi3: spi@54000000 {
577 #address-cells = <1>;
578 #size-cells = <0>;
579 compatible = "kendryte,k210-spi",
580 "snps,dw-apb-ssi";
581 reg = <0x54000000 0x200>;
582 interrupts = <4>;
583 clocks = <&sysclk K210_CLK_SPI3>;
584 clock-names = "ssi_clk";
585 resets = <&sysrst K210_RST_SPI3>;
586 /* Could possibly go up to 200 MHz */
587 spi-max-frequency = <100000000>;
588 num-cs = <4>;
589 reg-io-width = <4>;
590 status = "disabled";
591 };
592 };
593 };
594};