blob: a692529689d34bf66ccf0c28abb0eae2b26bcdc4 [file] [log] [blame]
Kumar Galaf852ce72007-11-29 00:15:30 -06001/*
2 * Copyright 2007 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <libfdt.h>
28#include <fdt_support.h>
Kumar Gala730b2fc2008-05-29 11:22:06 -050029#include <asm/processor.h>
Kumar Galaf852ce72007-11-29 00:15:30 -060030
Trent Piepho58ec4862008-12-03 15:16:38 -080031DECLARE_GLOBAL_DATA_PTR;
32
Kumar Gala69018ce2008-01-17 08:25:45 -060033extern void ft_qe_setup(void *blob);
Kim Phillips6b70ffb2008-06-16 15:55:53 -050034
Kumar Galaec2b74f2008-01-17 16:48:33 -060035#ifdef CONFIG_MP
36#include "mp.h"
Kumar Galaec2b74f2008-01-17 16:48:33 -060037
38void ft_fixup_cpu(void *blob, u64 memory_limit)
39{
40 int off;
41 ulong spin_tbl_addr = get_spin_addr();
Kumar Galac840d262009-03-31 23:11:05 -050042 u32 bootpg = determine_mp_bootpg();
43 u32 id = get_my_id();
Kumar Galaec2b74f2008-01-17 16:48:33 -060044
45 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
46 while (off != -FDT_ERR_NOTFOUND) {
47 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
48
49 if (reg) {
50 if (*reg == id) {
51 fdt_setprop_string(blob, off, "status", "okay");
52 } else {
Kumar Gala0878af12008-04-18 11:29:01 -050053 u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
Kumar Galaec2b74f2008-01-17 16:48:33 -060054 val = cpu_to_fdt32(val);
55 fdt_setprop_string(blob, off, "status",
56 "disabled");
57 fdt_setprop_string(blob, off, "enable-method",
58 "spin-table");
59 fdt_setprop(blob, off, "cpu-release-addr",
60 &val, sizeof(val));
61 }
62 } else {
63 printf ("cpu NULL\n");
64 }
65 off = fdt_node_offset_by_prop_value(blob, off,
66 "device_type", "cpu", 4);
67 }
68
69 /* Reserve the boot page so OSes dont use it */
70 if ((u64)bootpg < memory_limit) {
71 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
72 if (off < 0)
73 printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
74 }
75}
76#endif
Kumar Gala69018ce2008-01-17 08:25:45 -060077
Kumar Gala1b3e4042009-03-19 09:16:10 -050078#define ft_fixup_l3cache(x, y)
79
80#if defined(CONFIG_L2_CACHE)
Kumar Gala730b2fc2008-05-29 11:22:06 -050081/* return size in kilobytes */
82static inline u32 l2cache_size(void)
83{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
Kumar Gala730b2fc2008-05-29 11:22:06 -050085 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
86 u32 ver = SVR_SOC_VER(get_svr());
87
88 switch (l2siz_field) {
89 case 0x0:
90 break;
91 case 0x1:
92 if (ver == SVR_8540 || ver == SVR_8560 ||
93 ver == SVR_8541 || ver == SVR_8541_E ||
94 ver == SVR_8555 || ver == SVR_8555_E)
95 return 128;
96 else
97 return 256;
98 break;
99 case 0x2:
100 if (ver == SVR_8540 || ver == SVR_8560 ||
101 ver == SVR_8541 || ver == SVR_8541_E ||
102 ver == SVR_8555 || ver == SVR_8555_E)
103 return 256;
104 else
105 return 512;
106 break;
107 case 0x3:
108 return 1024;
109 break;
110 }
111
112 return 0;
113}
114
115static inline void ft_fixup_l2cache(void *blob)
116{
117 int len, off;
118 u32 *ph;
119 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
120 char compat_buf[38];
121
122 const u32 line_size = 32;
123 const u32 num_ways = 8;
124 const u32 size = l2cache_size() * 1024;
125 const u32 num_sets = size / (line_size * num_ways);
126
127 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
128 if (off < 0) {
129 debug("no cpu node fount\n");
130 return;
131 }
132
133 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
134
135 if (ph == NULL) {
136 debug("no next-level-cache property\n");
137 return ;
138 }
139
140 off = fdt_node_offset_by_phandle(blob, *ph);
141 if (off < 0) {
142 printf("%s: %s\n", __func__, fdt_strerror(off));
143 return ;
144 }
145
146 if (cpu) {
147 len = sprintf(compat_buf, "fsl,mpc%s-l2-cache-controller",
148 cpu->name);
149 sprintf(&compat_buf[len + 1], "cache");
150 }
151 fdt_setprop(blob, off, "cache-unified", NULL, 0);
152 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500153 fdt_setprop_cell(blob, off, "cache-size", size);
154 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
155 fdt_setprop_cell(blob, off, "cache-level", 2);
156 fdt_setprop(blob, off, "compatible", compat_buf, sizeof(compat_buf));
Kumar Gala1b3e4042009-03-19 09:16:10 -0500157
158 /* we dont bother w/L3 since no platform of this type has one */
159}
160#elif defined(CONFIG_BACKSIDE_L2_CACHE)
161static inline void ft_fixup_l2cache(void *blob)
162{
163 int off, l2_off, l3_off = -1;
164 u32 *ph;
165 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
166 u32 size, line_size, num_ways, num_sets;
167
168 size = (l2cfg0 & 0x3fff) * 64 * 1024;
169 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
170 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
171 num_sets = size / (line_size * num_ways);
172
173 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
174
175 while (off != -FDT_ERR_NOTFOUND) {
176 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
177
178 if (ph == NULL) {
179 debug("no next-level-cache property\n");
180 goto next;
181 }
182
183 l2_off = fdt_node_offset_by_phandle(blob, *ph);
184 if (l2_off < 0) {
185 printf("%s: %s\n", __func__, fdt_strerror(off));
186 goto next;
187 }
188
189 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
190 fdt_setprop_cell(blob, l2_off, "cache-block-size", line_size);
191 fdt_setprop_cell(blob, l2_off, "cache-size", size);
192 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
193 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
194 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
195
196 if (l3_off < 0) {
197 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
198
199 if (ph == NULL) {
200 debug("no next-level-cache property\n");
201 goto next;
202 }
203 l3_off = *ph;
204 }
205next:
206 off = fdt_node_offset_by_prop_value(blob, off,
207 "device_type", "cpu", 4);
208 }
209 if (l3_off > 0) {
210 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
211 if (l3_off < 0) {
212 printf("%s: %s\n", __func__, fdt_strerror(off));
213 return ;
214 }
215 ft_fixup_l3cache(blob, l3_off);
216 }
Kumar Gala730b2fc2008-05-29 11:22:06 -0500217}
218#else
219#define ft_fixup_l2cache(x)
220#endif
221
222static inline void ft_fixup_cache(void *blob)
223{
224 int off;
225
226 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
227
228 while (off != -FDT_ERR_NOTFOUND) {
229 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
230 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
231 u32 isize, iline_size, inum_sets, inum_ways;
232 u32 dsize, dline_size, dnum_sets, dnum_ways;
233
234 /* d-side config */
235 dsize = (l1cfg0 & 0x7ff) * 1024;
236 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
237 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
238 dnum_sets = dsize / (dline_size * dnum_ways);
239
240 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500241 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
242 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
243
244 /* i-side config */
245 isize = (l1cfg1 & 0x7ff) * 1024;
246 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
247 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
248 inum_sets = isize / (iline_size * inum_ways);
249
250 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500251 fdt_setprop_cell(blob, off, "i-cache-size", isize);
252 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
253
254 off = fdt_node_offset_by_prop_value(blob, off,
255 "device_type", "cpu", 4);
256 }
257
258 ft_fixup_l2cache(blob);
259}
260
261
Andy Fleming0e17f022008-10-07 08:09:50 -0500262void fdt_add_enet_stashing(void *fdt)
263{
264 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
265
266 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
267
268 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
269}
270
Kumar Galaf852ce72007-11-29 00:15:30 -0600271void ft_cpu_setup(void *blob, bd_t *bd)
272{
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500273 int off;
274 int val;
275 sys_info_t sysinfo;
276
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500277 /* delete crypto node if not on an E-processor */
278 if (!IS_E_PROCESSOR(get_svr()))
279 fdt_fixup_crypto_node(blob, 0);
280
Kumar Galaba37aa02008-08-19 15:41:18 -0500281 fdt_fixup_ethernet(blob);
Andy Fleming0e17f022008-10-07 08:09:50 -0500282
283 fdt_add_enet_stashing(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600284
285 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
286 "timebase-frequency", bd->bi_busfreq / 8, 1);
287 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
288 "bus-frequency", bd->bi_busfreq, 1);
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500289 get_sys_info(&sysinfo);
290 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
291 while (off != -FDT_ERR_NOTFOUND) {
292 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
293 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
294 fdt_setprop(blob, off, "clock-frequency", &val, 4);
295 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
296 "cpu", 4);
297 }
Kumar Galaf852ce72007-11-29 00:15:30 -0600298 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
299 "bus-frequency", bd->bi_busfreq, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800300
301 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
302 "bus-frequency", gd->lbc_clk, 1);
303 do_fixup_by_compat_u32(blob, "fsl,elbc",
304 "bus-frequency", gd->lbc_clk, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600305#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -0600306 ft_qe_setup(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600307#endif
308
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200309#ifdef CONFIG_SYS_NS16550
Kumar Galaf852ce72007-11-29 00:15:30 -0600310 do_fixup_by_compat_u32(blob, "ns16550",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200311 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600312#endif
313
314#ifdef CONFIG_CPM2
315 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
316 "current-speed", bd->bi_baudrate, 1);
317
318 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
319 "clock-frequency", bd->bi_brgfreq, 1);
320#endif
321
322 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
Kumar Galaec2b74f2008-01-17 16:48:33 -0600323
324#ifdef CONFIG_MP
325 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
326#endif
Kumar Gala730b2fc2008-05-29 11:22:06 -0500327
328 ft_fixup_cache(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600329}