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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenkc837dcb2004-01-20 23:12:12 +00002 * (C) Copyright 2000-2004
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * David Updegraff, Cray, Inc. dave@cray.com: our 405 is walnut-lite..
5 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00007 */
8/*
9 * board/config.h - configuration options, board specific
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#define CONFIG_CRAYL1
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
21#define CONFIG_405GP 1 /* This is a PPC405 CPU */
22#define CONFIG_4xx 1 /* ...member of PPC405 family */
Wolfgang Denk2ae18242010-10-06 09:05:45 +020023
24/*
25 * Note: I make an "image" from U-Boot itself, which prefixes 0x40
26 * bytes of header info, hence start address is thus shifted.
27 */
28#define CONFIG_SYS_TEXT_BASE 0xFFFD0040
29
wdenkc6097192002-11-03 00:24:07 +000030#define CONFIG_SYS_CLK_FREQ 25000000
31#define CONFIG_BAUDRATE 9600
32#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
Ben Warren96e21f82008-10-27 23:50:15 -070033
34#define CONFIG_PPC4xx_EMAC
wdenkc6097192002-11-03 00:24:07 +000035#define CONFIG_MII 1 /* MII PHY management */
36#define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */
wdenkc837dcb2004-01-20 23:12:12 +000037#define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */
wdenkc6097192002-11-03 00:24:07 +000038#define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */
39
Stefan Roese550650d2010-09-20 16:05:31 +020040#define CONFIG_CONS_INDEX 1 /* Use UART0 */
41#define CONFIG_SYS_NS16550
42#define CONFIG_SYS_NS16550_SERIAL
43#define CONFIG_SYS_NS16550_REG_SIZE 1
44#define CONFIG_SYS_NS16550_CLK get_serial_clock()
45
wdenkc6097192002-11-03 00:24:07 +000046/* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
47 * keep possible initrd ramdisk decompression out. This is in k (1024 bytes)
wdenk8bde7f72003-06-27 21:31:46 +000048 #define CONFIG_PRAM 16
wdenkc6097192002-11-03 00:24:07 +000049 */
wdenk7f70e852003-05-20 14:25:27 +000050#define CONFIG_LOADADDR 0x100000 /* where TFTP images go */
wdenkc6097192002-11-03 00:24:07 +000051#undef CONFIG_BOOTARGS
52
wdenk7f70e852003-05-20 14:25:27 +000053/* Bootcmd is overridden by the bootscript in board/cray/L1
wdenkc6097192002-11-03 00:24:07 +000054 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#define CONFIG_SYS_AUTOLOAD "no"
wdenk7f70e852003-05-20 14:25:27 +000056#define CONFIG_BOOTCOMMAND "dhcp"
wdenkc6097192002-11-03 00:24:07 +000057
wdenk8bde7f72003-06-27 21:31:46 +000058/*
wdenkc6097192002-11-03 00:24:07 +000059 * ..during experiments..
60 #define CONFIG_SERVERIP 10.0.0.1
wdenk8bde7f72003-06-27 21:31:46 +000061 #define CONFIG_ETHADDR 00:40:a6:80:14:5
wdenkc6097192002-11-03 00:24:07 +000062 */
Dirk Eibach880540d2013-04-25 02:40:01 +000063#define CONFIG_SYS_I2C
64#define CONFIG_SYS_I2C_PPC4XX
65#define CONFIG_SYS_I2C_PPC4XX_CH0
wdenk7f70e852003-05-20 14:25:27 +000066#define CONFIG_SDRAM_BANK0 1
Dirk Eibach880540d2013-04-25 02:40:01 +000067#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
68#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
70#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
wdenkc6097192002-11-03 00:24:07 +000071#define CONFIG_IDENT_STRING "Cray L1"
72#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
74#define CONFIG_SYS_HUSH_PARSER 1
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020075#define CONFIG_SOURCE 1
wdenkc6097192002-11-03 00:24:07 +000076
77
Jon Loeliger49cf7e82007-07-05 19:52:35 -050078/*
79 * Command line configuration.
80 */
81
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020082#define CONFIG_CMD_ASKENV
Jon Loeliger49cf7e82007-07-05 19:52:35 -050083#define CONFIG_CMD_BDI
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020084#define CONFIG_CMD_CONSOLE
85#define CONFIG_CMD_DATE
86#define CONFIG_CMD_DHCP
87#define CONFIG_CMD_DIAG
88#define CONFIG_CMD_ECHO
89#define CONFIG_CMD_EEPROM
Jon Loeliger49cf7e82007-07-05 19:52:35 -050090#define CONFIG_CMD_FLASH
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020091#define CONFIG_CMD_I2C
92#define CONFIG_CMD_IMI
93#define CONFIG_CMD_IMMAP
Jon Loeliger49cf7e82007-07-05 19:52:35 -050094#define CONFIG_CMD_MEMORY
95#define CONFIG_CMD_NET
Jon Loeliger49cf7e82007-07-05 19:52:35 -050096#define CONFIG_CMD_REGINFO
Jon Loeliger49cf7e82007-07-05 19:52:35 -050097#define CONFIG_CMD_RUN
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020098#define CONFIG_CMD_SAVEENV
Jon Loeliger49cf7e82007-07-05 19:52:35 -050099#define CONFIG_CMD_SETGETDCR
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200100#define CONFIG_CMD_SOURCE
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500101
wdenkc6097192002-11-03 00:24:07 +0000102
103/*
Jon Loeliger5d2ebe12007-07-09 21:16:53 -0500104 * BOOTP options
wdenkc6097192002-11-03 00:24:07 +0000105 */
Jon Loeliger5d2ebe12007-07-09 21:16:53 -0500106#define CONFIG_BOOTP_SUBNETMASK
107#define CONFIG_BOOTP_GATEWAY
108#define CONFIG_BOOTP_HOSTNAME
109#define CONFIG_BOOTP_BOOTPATH
110#define CONFIG_BOOTP_VENDOREX
111#define CONFIG_BOOTP_DNS
112#define CONFIG_BOOTP_BOOTFILESIZE
113
wdenkc6097192002-11-03 00:24:07 +0000114
wdenk8bde7f72003-06-27 21:31:46 +0000115/*
wdenk7f70e852003-05-20 14:25:27 +0000116 * how many time to fail & restart a net-TFTP before giving up & resetting
117 * the board hoping that a reset of net interface might help..
118 */
119#define CONFIG_NET_RESET 5
120
wdenk8bde7f72003-06-27 21:31:46 +0000121/*
wdenkc6097192002-11-03 00:24:07 +0000122 * bauds. Just to make it compile; in our case, I read the base_baud
123 * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn
124 * drives the system clock.
125 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_BASE_BAUD 403225
127#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkc6097192002-11-03 00:24:07 +0000128 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
129
wdenkc6097192002-11-03 00:24:07 +0000130/*
131 * Miscellaneous configurable options
132 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
134#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
135#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
136#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
137#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
wdenkc6097192002-11-03 00:24:07 +0000138
139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
142#define CONFIG_SYS_DRAM_TEST 1
wdenkc6097192002-11-03 00:24:07 +0000143
144/*-----------------------------------------------------------------------
145 * Start addresses for the final memory configuration
146 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc6097192002-11-03 00:24:07 +0000148 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_SDRAM_BASE 0x00000000
150#define CONFIG_SYS_FLASH_BASE 0xFFC00000
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200151#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
wdenkc6097192002-11-03 00:24:07 +0000152
wdenkc6097192002-11-03 00:24:07 +0000153
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */
wdenkc6097192002-11-03 00:24:07 +0000155
156/*
157 * For booting Linux, the board info and command line data
158 * have to be in the first 8 MB of memory, since this is
159 * the maximum mapped by the Linux kernel during initialization.
160 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc6097192002-11-03 00:24:07 +0000162/*-----------------------------------------------------------------------
163 * FLASH organization
164 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
166#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
167#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
168#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkc6097192002-11-03 00:24:07 +0000169
170/* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200171#define CONFIG_ENV_OFFSET 0x3c8000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200172#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200173#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment area */
174#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
wdenkc6097192002-11-03 00:24:07 +0000175
wdenk7f70e852003-05-20 14:25:27 +0000176/* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
wdenkc6097192002-11-03 00:24:07 +0000177 * 32meg-(128k+some_malloc_space+copy-of-ENV sector)..
178 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_SDRAM_SIZE 32 /* megs of ram */
180#define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */
wdenkc6097192002-11-03 00:24:07 +0000181 /* the exception vector table */
182 /* to the end of the DRAM */
183 /* less monitor and malloc area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */
185#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128k for malloc space */
186#define CONFIG_SYS_MEM_END_USAGE ( CONFIG_SYS_MONITOR_LEN \
187 + CONFIG_SYS_MALLOC_LEN \
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200188 + CONFIG_ENV_SECT_SIZE \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189 + CONFIG_SYS_STACK_USAGE )
wdenkc6097192002-11-03 00:24:07 +0000190
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE)
wdenkc6097192002-11-03 00:24:07 +0000192/* END ENVIRONNEMENT FLASH */
193
wdenkc6097192002-11-03 00:24:07 +0000194/*
195 * Init Memory Controller:
196 *
197 * BR0/1 and OR0/1 (FLASH)
198 */
199
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
wdenkc6097192002-11-03 00:24:07 +0000201
202
203/*-----------------------------------------------------------------------
204 * Definitions for initial stack pointer and data area (in OnChipMem )
205 */
wdenk7f70e852003-05-20 14:25:27 +0000206#if 1
207/* On Chip Memory location */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_TEMP_STACK_OCM 1
209#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
210#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
wdenk7f70e852003-05-20 14:25:27 +0000211
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200213#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200214#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk7f70e852003-05-20 14:25:27 +0000216#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200217#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
218#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
219#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200220#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200221#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk7f70e852003-05-20 14:25:27 +0000223#endif
wdenkc6097192002-11-03 00:24:07 +0000224
225/*-----------------------------------------------------------------------
226 * Definitions for Serial Presence Detect EEPROM address
227 */
228#define EEPROM_WRITE_ADDRESS 0xA0
229#define EEPROM_READ_ADDRESS 0xA1
230
wdenkc6097192002-11-03 00:24:07 +0000231#endif /* __CONFIG_H */