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wdenk2262cfe2002-11-18 00:14:45 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02003 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
wdenk2262cfe2002-11-18 00:14:45 +00004 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk2262cfe2002-11-18 00:14:45 +00006 */
7
8#ifndef _PCI_I386_H_
Gabe Black452f50f2012-10-10 13:12:57 +00009#define _PCI_I386_H_
wdenk2262cfe2002-11-18 00:14:45 +000010
Simon Glassa219dae2015-03-05 12:25:31 -070011#include <pci.h>
12
Bin Meng3c8ae532015-02-02 22:35:25 +080013/* bus mapping constants (used for PCI core initialization) */
14#define PCI_REG_ADDR 0xcf8
15#define PCI_REG_DATA 0xcfc
16
17#define PCI_CFG_EN 0x80000000
18
19#ifndef __ASSEMBLY__
20
Graeme Russ83088af2011-11-08 02:33:15 +000021#define DEFINE_PCI_DEVICE_TABLE(_table) \
22 const struct pci_device_id _table[]
23
Simon Glassd188b182014-11-12 22:42:11 -070024struct pci_controller;
25
Graeme Russ1cfcf032011-11-08 02:33:22 +000026void pci_setup_type1(struct pci_controller *hose);
Simon Glassd188b182014-11-12 22:42:11 -070027
Simon Glass6fb3b722014-11-12 22:42:14 -070028/*
29 * Simple PCI access routines - these work from either the early PCI hose
30 * or the 'real' one, created after U-Boot has memory available
31 */
Simon Glass31f57c22015-03-05 12:25:15 -070032unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where);
33unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where);
34unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where);
Simon Glass6fb3b722014-11-12 22:42:14 -070035
Simon Glass31f57c22015-03-05 12:25:15 -070036void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
37void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
38void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
Simon Glass6fb3b722014-11-12 22:42:14 -070039
Simon Glassa219dae2015-03-05 12:25:31 -070040int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
41 ulong *valuep, enum pci_size_t size);
42
43int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
44 ulong value, enum pci_size_t size);
45
Bin Menge3e7fa22015-04-24 18:10:03 +080046/**
47 * Assign IRQ number to a PCI device
48 *
49 * This function assigns IRQ for a PCI device. If the device does not exist
50 * or does not require interrupts then this function has no effect.
51 *
52 * @bus: PCI bus number
53 * @device: PCI device number
Bin Menge3e7fa22015-04-24 18:10:03 +080054 * @irq: An array of IRQ numbers that are assigned to INTA through
55 * INTD of this PCI device.
56 */
Bin Meng31a2dc62015-07-15 16:23:40 +080057void pci_assign_irqs(int bus, int device, u8 irq[4]);
Bin Menge3e7fa22015-04-24 18:10:03 +080058
Bin Meng3c8ae532015-02-02 22:35:25 +080059#endif /* __ASSEMBLY__ */
60
61#endif /* _PCI_I386_H_ */