Blame - include/configs/tegra-common-post.h - platform/external/u-boot

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Tom Rini	83d290c	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	2	/*
				3	* (C) Copyright 2010-2012
				4	* NVIDIA Corporation <www.nvidia.com>
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	5	*/
				6
Tom Warren	29f3e3f	2012-09-04 17:00:24 -0700	[diff] [blame]	7	#ifndef __TEGRA_COMMON_POST_H
				8	#define __TEGRA_COMMON_POST_H
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	9
Stephen Warren	99d9696	2015-09-04 22:03:48 -0600	[diff] [blame]	10	#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
Stephen Warren	99d9696	2015-09-04 22:03:48 -0600	[diff] [blame]	11
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	12	#ifndef CONFIG_SPL_BUILD
Tom Rini	3fa03bc	2021-07-09 10:11:54 -0400	[diff] [blame]	13
				14	#if CONFIG_IS_ENABLED(CMD_USB)
				15	# define BOOT_TARGET_USB(func) func(USB, usb, 0)
				16	#else
				17	# define BOOT_TARGET_USB(func)
				18	#endif
				19
Thierry Reding	147fac6	2019-04-15 11:32:24 +0200	[diff] [blame]	20	#ifndef BOOT_TARGET_DEVICES
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	21	#define BOOT_TARGET_DEVICES(func) \
				22	func(MMC, mmc, 1) \
				23	func(MMC, mmc, 0) \
Tom Rini	3fa03bc	2021-07-09 10:11:54 -0400	[diff] [blame]	24	BOOT_TARGET_USB(func) \
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	25	func(PXE, pxe, na) \
				26	func(DHCP, dhcp, na)
Thierry Reding	147fac6	2019-04-15 11:32:24 +0200	[diff] [blame]	27	#endif
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	28	#include <config_distro_bootcmd.h>
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	29	#else
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	30	#define BOOTENV
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	31	#endif
				32
Allen Martin	7992bfb	2012-10-24 08:32:05 +0000	[diff] [blame]	33	#ifdef CONFIG_TEGRA_KEYBOARD
				34	#define STDIN_KBD_KBC ",tegra-kbc"
				35	#else
				36	#define STDIN_KBD_KBC ""
				37	#endif
				38
				39	#ifdef CONFIG_USB_KEYBOARD
				40	#define STDIN_KBD_USB ",usbkbd"
Allen Martin	7992bfb	2012-10-24 08:32:05 +0000	[diff] [blame]	41	#else
				42	#define STDIN_KBD_USB ""
				43	#endif
				44
Simon Glass	ec022ef	2015-04-14 21:03:31 -0600	[diff] [blame]	45	#ifdef CONFIG_LCD
Stephen Warren	c35eb56	2013-01-22 06:20:07 +0000	[diff] [blame]	46	#define STDOUT_LCD ",lcd"
				47	#else
				48	#define STDOUT_LCD ""
				49	#endif
				50
Simon Glass	135a87e	2016-01-30 16:37:49 -0700	[diff] [blame]	51	#ifdef CONFIG_DM_VIDEO
				52	#define STDOUT_VIDEO ",vidconsole"
				53	#else
				54	#define STDOUT_VIDEO ""
				55	#endif
				56
Simon Glass	bbe0d4d	2015-06-05 14:39:32 -0600	[diff] [blame]	57	#ifdef CONFIG_CROS_EC_KEYB
				58	#define STDOUT_CROS_EC ",cros-ec-keyb"
				59	#else
				60	#define STDOUT_CROS_EC ""
				61	#endif
				62
Allen Martin	7992bfb	2012-10-24 08:32:05 +0000	[diff] [blame]	63	#define TEGRA_DEVICE_SETTINGS \
Simon Glass	bbe0d4d	2015-06-05 14:39:32 -0600	[diff] [blame]	64	"stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \
Simon Glass	135a87e	2016-01-30 16:37:49 -0700	[diff] [blame]	65	"stdout=serial" STDOUT_LCD STDOUT_VIDEO "\0" \
				66	"stderr=serial" STDOUT_LCD STDOUT_VIDEO "\0" \
Stephen Warren	c35eb56	2013-01-22 06:20:07 +0000	[diff] [blame]	67	""
Allen Martin	7992bfb	2012-10-24 08:32:05 +0000	[diff] [blame]	68
Stephen Warren	b9b53a6	2014-01-23 13:17:01 -0700	[diff] [blame]	69	#ifndef BOARD_EXTRA_ENV_SETTINGS
				70	#define BOARD_EXTRA_ENV_SETTINGS
				71	#endif
				72
Simon Glass	e379b03	2015-06-05 14:39:44 -0600	[diff] [blame]	73	#ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
				74	#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
				75	#endif
				76
Tom Warren	7aaa5a6	2015-03-04 16:36:00 -0700	[diff] [blame]	77	#ifdef CONFIG_ARM64
				78	#define FDT_HIGH "ffffffffffffffff"
				79	#define INITRD_HIGH "ffffffffffffffff"
				80	#else
				81	#define FDT_HIGH "ffffffff"
				82	#define INITRD_HIGH "ffffffff"
				83	#endif
				84
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	85	#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Warren	29f3e3f	2012-09-04 17:00:24 -0700	[diff] [blame]	86	TEGRA_DEVICE_SETTINGS \
Stephen Warren	938176a	2012-10-02 09:26:51 +0000	[diff] [blame]	87	MEM_LAYOUT_ENV_SETTINGS \
Tom Warren	7aaa5a6	2015-03-04 16:36:00 -0700	[diff] [blame]	88	"fdt_high=" FDT_HIGH "\0" \
				89	"initrd_high=" INITRD_HIGH "\0" \
Stephen Warren	8dca9ff	2014-07-30 16:37:15 -0600	[diff] [blame]	90	BOOTENV \
Simon Glass	e379b03	2015-06-05 14:39:44 -0600	[diff] [blame]	91	BOARD_EXTRA_ENV_SETTINGS \
				92	CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
Stephen Warren	bea2674	2012-05-16 06:21:00 +0000	[diff] [blame]	93
Allen Martin	77c42e8	2013-03-16 18:58:13 +0000	[diff] [blame]	94	#if defined(CONFIG_TEGRA20_SFLASH) \|\| defined(CONFIG_TEGRA20_SLINK) \|\| defined(CONFIG_TEGRA114_SPI)
Simon Glass	fda6fac	2014-10-13 23:42:13 -0600	[diff] [blame]	95	#define CONFIG_TEGRA_SPI
Allen Martin	78f47b7	2013-03-16 18:58:07 +0000	[diff] [blame]	96	#endif
				97
Tom Warren	29f3e3f	2012-09-04 17:00:24 -0700	[diff] [blame]	98	#endif /* __TEGRA_COMMON_POST_H */