Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _CONFIG_DB_88F6820_GP_H |
| 7 | #define _CONFIG_DB_88F6820_GP_H |
| 8 | |
| 9 | /* |
| 10 | * High Level Configuration Options (easy to change) |
| 11 | */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 12 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 13 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 14 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 15 | /* I2C */ |
| 16 | #define CONFIG_SYS_I2C |
| 17 | #define CONFIG_SYS_I2C_MVTWSI |
| 18 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE |
| 19 | #define CONFIG_SYS_I2C_SLAVE 0x0 |
| 20 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 21 | |
Konstantin Porotchkin | d3c72c5 | 2018-08-29 16:34:53 +0300 | [diff] [blame] | 22 | /* |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 23 | * SDIO/MMC Card Configuration |
| 24 | */ |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
| 26 | |
Stefan Roese | 7cbaff9 | 2015-06-29 14:58:14 +0200 | [diff] [blame] | 27 | /* |
| 28 | * SATA/SCSI/AHCI configuration |
| 29 | */ |
Stefan Roese | 7cbaff9 | 2015-06-29 14:58:14 +0200 | [diff] [blame] | 30 | #define CONFIG_SCSI_AHCI_PLAT |
| 31 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 32 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 33 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 34 | CONFIG_SYS_SCSI_MAX_LUN) |
| 35 | |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 36 | /* USB/EHCI configuration */ |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 37 | #define CONFIG_EHCI_IS_TDI |
| 38 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 39 | /* Environment in SPI NOR flash */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 40 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 41 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 42 | |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 43 | /* PCIe support */ |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 44 | #ifndef CONFIG_SPL_BUILD |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 45 | #define CONFIG_PCI_SCAN_SHOW |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 46 | #endif |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 47 | |
Kevin Smith | 3fd38af | 2015-05-18 16:09:46 +0000 | [diff] [blame] | 48 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
| 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 50 | "fdt_high=0x10000000\0" \ |
| 51 | "initrd_high=0x10000000\0" |
| 52 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 53 | /* SPL */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 54 | /* |
| 55 | * Select the boot device here |
| 56 | * |
| 57 | * Currently supported are: |
| 58 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash |
| 59 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) |
| 60 | */ |
| 61 | #define SPL_BOOT_SPI_NOR_FLASH 1 |
| 62 | #define SPL_BOOT_SDIO_MMC_CARD 2 |
| 63 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH |
| 64 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 65 | /* Defines for SPL */ |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 66 | #define CONFIG_SPL_SIZE (140 << 10) |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 67 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) |
| 68 | |
| 69 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) |
| 70 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) |
| 71 | |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 72 | #ifdef CONFIG_SPL_BUILD |
| 73 | #define CONFIG_SYS_MALLOC_SIMPLE |
| 74 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 75 | |
| 76 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) |
| 77 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |
| 78 | |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 79 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 80 | /* SPL related SPI defines */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
| 82 | #endif |
| 83 | |
| 84 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD |
| 85 | /* SPL related MMC defines */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) |
| 87 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 88 | #ifdef CONFIG_SPL_BUILD |
| 89 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ |
| 90 | #endif |
| 91 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 92 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 93 | /* |
| 94 | * mv-common.h should be defined after CMD configs since it used them |
| 95 | * to enable certain macros |
| 96 | */ |
| 97 | #include "mv-common.h" |
| 98 | |
| 99 | #endif /* _CONFIG_DB_88F6820_GP_H */ |