wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
Stefan Roese | a47a12b | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 6 | * Code in faintly related to linux/arch/powerpc/8xx_io: |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 7 | * MPC8xx CPM I2C interface. Copyright (c) 1999 Dan Malek (dmalek@jlc.net). |
| 8 | * |
| 9 | * This file implements functions to read the MBX's Vital Product Data |
| 10 | * (VPD). I can't use the more general i2c code in mpc8xx/... since I need |
| 11 | * the VPD at a time where there is no RAM available yet. Hence the VPD is |
| 12 | * read into a special area in the DPRAM (see config_MBX.h::CFG_DPRAMVPD). |
| 13 | * |
| 14 | * ----------------------------------------------------------------- |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 15 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #ifdef CONFIG_8xx |
| 20 | #include <commproc.h> |
| 21 | #endif |
| 22 | #include "vpd.h" |
| 23 | |
| 24 | /* Location of receive/transmit buffer descriptors |
| 25 | * Allocate one transmit bd and one receive bd. |
| 26 | * IIC_BD_FREE points to free bd space which we'll use as tx buffer. |
| 27 | */ |
| 28 | #define IIC_BD_TX1 (BD_IIC_START + 0*sizeof(cbd_t)) |
| 29 | #define IIC_BD_TX2 (BD_IIC_START + 1*sizeof(cbd_t)) |
| 30 | #define IIC_BD_RX (BD_IIC_START + 2*sizeof(cbd_t)) |
| 31 | #define IIC_BD_FREE (BD_IIC_START + 3*sizeof(cbd_t)) |
| 32 | |
| 33 | /* FIXME -- replace 0x2000 with offsetof */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 34 | #define VPD_P ((vpd_t *)(CONFIG_SYS_IMMR + 0x2000 + CONFIG_SYS_DPRAMVPD)) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 35 | |
| 36 | /* transmit/receive buffers */ |
| 37 | #define IIC_RX_LENGTH 128 |
| 38 | |
| 39 | #define WITH_MICROCODE_PATCH |
| 40 | |
| 41 | vpd_packet_t * vpd_find_packet(u_char ident) |
| 42 | { |
| 43 | vpd_packet_t *packet; |
| 44 | vpd_t *vpd = VPD_P; |
| 45 | |
| 46 | packet = (vpd_packet_t *)&vpd->packets; |
| 47 | while ((packet->identifier != ident) && packet->identifier != 0xFF) |
| 48 | { |
| 49 | packet = (vpd_packet_t *)((char *)packet + packet->size + 2); |
| 50 | } |
| 51 | return packet; |
| 52 | } |
| 53 | |
| 54 | void vpd_init(void) |
| 55 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 56 | volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 57 | volatile cpm8xx_t *cp = &(im->im_cpm); |
| 58 | volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c); |
| 59 | volatile iic_t *iip; |
| 60 | #ifdef WITH_MICROCODE_PATCH |
| 61 | ulong reloc = 0; |
| 62 | #endif |
| 63 | |
| 64 | iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; |
| 65 | |
| 66 | /* |
| 67 | * kludge: when running from flash, no microcode patch can be |
| 68 | * installed. However, the DPMEM usually contains non-zero |
| 69 | * garbage at the relocatable patch base location, so lets clear |
| 70 | * it now. This way the rest of the code can support the microcode |
| 71 | * patch dynamically. |
| 72 | */ |
| 73 | if ((ulong)vpd_init & 0xff000000) |
| 74 | iip->iic_rpbase = 0; |
| 75 | |
| 76 | #ifdef WITH_MICROCODE_PATCH |
| 77 | /* Check for and use a microcode relocation patch. */ |
| 78 | if ((reloc = iip->iic_rpbase)) |
| 79 | iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase]; |
| 80 | #endif |
| 81 | /* Initialize Port B IIC pins */ |
| 82 | cp->cp_pbpar |= 0x00000030; |
| 83 | cp->cp_pbdir |= 0x00000030; |
| 84 | cp->cp_pbodr |= 0x00000030; |
| 85 | |
| 86 | i2c->i2c_i2mod = 0x04; /* filter clock */ |
| 87 | i2c->i2c_i2add = 0x34; /* select an arbitrary (unique) address */ |
| 88 | i2c->i2c_i2brg = 0x07; /* make clock run maximum slow */ |
| 89 | i2c->i2c_i2cmr = 0x00; /* disable interrupts */ |
| 90 | i2c->i2c_i2cer = 0x1f; /* clear events */ |
| 91 | i2c->i2c_i2com = 0x01; /* configure i2c to work as master */ |
| 92 | |
| 93 | if (vpd_read(0xa4, (uchar*)VPD_P, VPD_EEPROM_SIZE, 0) != VPD_EEPROM_SIZE) |
| 94 | { |
| 95 | hang(); |
| 96 | } |
| 97 | } |
| 98 | |
| 99 | |
| 100 | /* Read from I2C. |
| 101 | * This is a two step process. First, we send the "dummy" write |
| 102 | * to set the device offset for the read. Second, we perform |
| 103 | * the read operation. |
| 104 | */ |
| 105 | int vpd_read(uint iic_device, uchar *buf, int count, int offset) |
| 106 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 108 | volatile cpm8xx_t *cp = &(im->im_cpm); |
| 109 | volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c); |
| 110 | volatile iic_t *iip; |
| 111 | volatile cbd_t *tbdf1, *tbdf2, *rbdf; |
| 112 | uchar *tb; |
| 113 | uchar event; |
| 114 | #ifdef WITH_MICROCODE_PATCH |
| 115 | ulong reloc = 0; |
| 116 | #endif |
| 117 | |
| 118 | iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; |
| 119 | #ifdef WITH_MICROCODE_PATCH |
| 120 | /* Check for and use a microcode relocation patch. */ |
| 121 | if ((reloc = iip->iic_rpbase)) |
| 122 | iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase]; |
| 123 | #endif |
| 124 | tbdf1 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX1]; |
| 125 | tbdf2 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX2]; |
| 126 | rbdf = (cbd_t *)&cp->cp_dpmem[IIC_BD_RX]; |
| 127 | |
| 128 | /* Send a "dummy write" operation. This is a write request with |
| 129 | * only the offset sent, followed by another start condition. |
| 130 | * This will ensure we start reading from the first location |
| 131 | * of the EEPROM. |
| 132 | */ |
| 133 | tb = (uchar*)&cp->cp_dpmem[IIC_BD_FREE]; |
| 134 | tb[0] = iic_device & 0xfe; /* device address */ |
| 135 | tb[1] = offset; /* offset */ |
| 136 | tbdf1->cbd_bufaddr = (uint)tb; |
| 137 | tbdf1->cbd_datlen = 2; |
| 138 | tbdf1->cbd_sc = 0x8400; |
| 139 | |
| 140 | tb += 2; |
| 141 | tb[0] = iic_device | 1; /* device address */ |
| 142 | tbdf2->cbd_bufaddr = (uint)tb; |
| 143 | tbdf2->cbd_datlen = count+1; |
| 144 | tbdf2->cbd_sc = 0xbc00; |
| 145 | |
| 146 | rbdf->cbd_bufaddr = (uint)buf; |
| 147 | rbdf->cbd_datlen = 0; |
| 148 | rbdf->cbd_sc = 0xb000; |
| 149 | |
| 150 | iip->iic_tbase = IIC_BD_TX1; |
| 151 | iip->iic_tbptr = IIC_BD_TX1; |
| 152 | iip->iic_rbase = IIC_BD_RX; |
| 153 | iip->iic_rbptr = IIC_BD_RX; |
| 154 | iip->iic_rfcr = 0x15; |
| 155 | iip->iic_tfcr = 0x15; |
| 156 | iip->iic_mrblr = count; |
| 157 | iip->iic_rstate = 0; |
| 158 | iip->iic_tstate = 0; |
| 159 | |
| 160 | i2c->i2c_i2cer = 0x1f; /* clear event mask */ |
| 161 | i2c->i2c_i2mod |= 1; /* enable iic operation */ |
| 162 | i2c->i2c_i2com |= 0x80; /* start master */ |
| 163 | |
| 164 | /* wait for IIC transfer */ |
| 165 | do { |
| 166 | __asm__ volatile ("eieio"); |
| 167 | event = i2c->i2c_i2cer; |
| 168 | } while (event == 0); |
| 169 | |
| 170 | if ((event & 0x10) || (event & 0x04)) { |
| 171 | count = -1; |
| 172 | goto bailout; |
| 173 | } |
| 174 | |
| 175 | bailout: |
| 176 | i2c->i2c_i2mod &= ~1; /* turn off iic operation */ |
| 177 | i2c->i2c_i2cer = 0x1f; /* clear event mask */ |
| 178 | |
| 179 | return count; |
| 180 | } |