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Jagannadha Sutradharudu Tekif8f36c52014-01-09 01:48:26 +05301/*
2 * Xilinx ZED board DTS
3 *
Michal Simek999667c2015-07-22 11:12:10 +02004 * Copyright (C) 2011 - 2015 Xilinx
5 * Copyright (C) 2012 National Instruments Corp.
Jagannadha Sutradharudu Tekif8f36c52014-01-09 01:48:26 +05306 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9/dts-v1/;
10#include "zynq-7000.dtsi"
11
12/ {
Michal Simek999667c2015-07-22 11:12:10 +020013 model = "Zynq Zed Development Board";
Jagannadha Sutradharudu Tekif8f36c52014-01-09 01:48:26 +053014 compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090015
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090016 aliases {
Michal Simek999667c2015-07-22 11:12:10 +020017 ethernet0 = &gem0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090018 serial0 = &uart1;
Jagan Teki976dfb02015-08-15 23:19:05 +053019 spi0 = &qspi;
Michal Simek86472192015-12-08 11:56:23 +010020 mmc0 = &sdhci0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090021 };
22
Michal Simekcc7978b2016-11-11 13:11:37 +010023 memory@0 {
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090024 device_type = "memory";
Michal Simek999667c2015-07-22 11:12:10 +020025 reg = <0x0 0x20000000>;
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090026 };
Michal Simek999667c2015-07-22 11:12:10 +020027
28 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020029 bootargs = "";
Michal Simek999667c2015-07-22 11:12:10 +020030 stdout-path = "serial0:115200n8";
31 };
32
33 usb_phy0: phy0 {
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
36 };
37};
38
39&clkc {
40 ps-clk-frequency = <33333333>;
41};
42
43&gem0 {
44 status = "okay";
45 phy-mode = "rgmii-id";
46 phy-handle = <&ethernet_phy>;
47
48 ethernet_phy: ethernet-phy@0 {
49 reg = <0>;
50 };
51};
52
Michal Simeka95d54b2016-04-07 13:04:15 +020053&qspi {
54 u-boot,dm-pre-reloc;
55 status = "okay";
56};
57
Michal Simek999667c2015-07-22 11:12:10 +020058&sdhci0 {
Michal Simek86472192015-12-08 11:56:23 +010059 u-boot,dm-pre-reloc;
Michal Simek999667c2015-07-22 11:12:10 +020060 status = "okay";
61};
62
63&uart1 {
Simon Glass035c6b22015-10-17 19:41:24 -060064 u-boot,dm-pre-reloc;
Michal Simek999667c2015-07-22 11:12:10 +020065 status = "okay";
66};
67
68&usb0 {
69 status = "okay";
70 dr_mode = "host";
71 usb-phy = <&usb_phy0>;
Jagannadha Sutradharudu Tekif8f36c52014-01-09 01:48:26 +053072};