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Etienne Carriere358599e2020-09-09 18:44:00 +02001/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*
3 * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
4 * Copyright (C) 2019-2020, Linaro Limited
5 */
6#ifndef _SCMI_PROTOCOLS_H
7#define _SCMI_PROTOCOLS_H
8
9#include <linux/bitops.h>
Etienne Carriere60388842020-09-09 18:44:04 +020010#include <asm/types.h>
Etienne Carriere358599e2020-09-09 18:44:00 +020011
12/*
13 * Subset the SCMI protocols definition
14 * based on SCMI specification v2.0 (DEN0056B)
15 * https://developer.arm.com/docs/den0056/b
16 */
17
18enum scmi_std_protocol {
19 SCMI_PROTOCOL_ID_BASE = 0x10,
20 SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
21 SCMI_PROTOCOL_ID_SYSTEM = 0x12,
22 SCMI_PROTOCOL_ID_PERF = 0x13,
23 SCMI_PROTOCOL_ID_CLOCK = 0x14,
24 SCMI_PROTOCOL_ID_SENSOR = 0x15,
25 SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
Etienne Carriere1f213ee2021-03-08 22:38:06 +010026 SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN = 0x17,
Etienne Carriere358599e2020-09-09 18:44:00 +020027};
28
29enum scmi_status_code {
30 SCMI_SUCCESS = 0,
31 SCMI_NOT_SUPPORTED = -1,
32 SCMI_INVALID_PARAMETERS = -2,
33 SCMI_DENIED = -3,
34 SCMI_NOT_FOUND = -4,
35 SCMI_OUT_OF_RANGE = -5,
36 SCMI_BUSY = -6,
37 SCMI_COMMS_ERROR = -7,
38 SCMI_GENERIC_ERROR = -8,
39 SCMI_HARDWARE_ERROR = -9,
40 SCMI_PROTOCOL_ERROR = -10,
41};
42
Etienne Carriere60388842020-09-09 18:44:04 +020043/*
44 * SCMI Clock Protocol
45 */
46
47enum scmi_clock_message_id {
48 SCMI_CLOCK_RATE_SET = 0x5,
49 SCMI_CLOCK_RATE_GET = 0x6,
50 SCMI_CLOCK_CONFIG_SET = 0x7,
51};
52
53#define SCMI_CLK_RATE_ASYNC_NOTIFY BIT(0)
54#define SCMI_CLK_RATE_ASYNC_NORESP (BIT(0) | BIT(1))
55#define SCMI_CLK_RATE_ROUND_DOWN 0
56#define SCMI_CLK_RATE_ROUND_UP BIT(2)
57#define SCMI_CLK_RATE_ROUND_CLOSEST BIT(3)
58
59/**
60 * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command
61 * @clock_id: SCMI clock ID
62 * @attributes: Attributes of the targets clock state
63 */
64struct scmi_clk_state_in {
65 u32 clock_id;
66 u32 attributes;
67};
68
69/**
70 * struct scmi_clk_state_out - Response payload for CLOCK_CONFIG_SET command
71 * @status: SCMI command status
72 */
73struct scmi_clk_state_out {
74 s32 status;
75};
76
77/**
78 * struct scmi_clk_state_in - Message payload for CLOCK_RATE_GET command
79 * @clock_id: SCMI clock ID
80 * @attributes: Attributes of the targets clock state
81 */
82struct scmi_clk_rate_get_in {
83 u32 clock_id;
84};
85
86/**
87 * struct scmi_clk_rate_get_out - Response payload for CLOCK_RATE_GET command
88 * @status: SCMI command status
89 * @rate_lsb: 32bit LSB of the clock rate in Hertz
90 * @rate_msb: 32bit MSB of the clock rate in Hertz
91 */
92struct scmi_clk_rate_get_out {
93 s32 status;
94 u32 rate_lsb;
95 u32 rate_msb;
96};
97
98/**
99 * struct scmi_clk_state_in - Message payload for CLOCK_RATE_SET command
Etienne Carriere60388842020-09-09 18:44:04 +0200100 * @flags: Flags for the clock rate set request
Clément Léger32cc3922021-10-13 16:00:04 +0200101 * @clock_id: SCMI clock ID
Etienne Carriere60388842020-09-09 18:44:04 +0200102 * @rate_lsb: 32bit LSB of the clock rate in Hertz
103 * @rate_msb: 32bit MSB of the clock rate in Hertz
104 */
105struct scmi_clk_rate_set_in {
Etienne Carriere60388842020-09-09 18:44:04 +0200106 u32 flags;
Clément Léger32cc3922021-10-13 16:00:04 +0200107 u32 clock_id;
Etienne Carriere60388842020-09-09 18:44:04 +0200108 u32 rate_lsb;
109 u32 rate_msb;
110};
111
112/**
113 * struct scmi_clk_rate_set_out - Response payload for CLOCK_RATE_SET command
114 * @status: SCMI command status
115 */
116struct scmi_clk_rate_set_out {
117 s32 status;
118};
119
Etienne Carriere34d76fe2020-09-09 18:44:06 +0200120/*
121 * SCMI Reset Domain Protocol
122 */
123
124enum scmi_reset_domain_message_id {
125 SCMI_RESET_DOMAIN_ATTRIBUTES = 0x3,
126 SCMI_RESET_DOMAIN_RESET = 0x4,
127};
128
129#define SCMI_RD_NAME_LEN 16
130
131#define SCMI_RD_ATTRIBUTES_FLAG_ASYNC BIT(31)
132#define SCMI_RD_ATTRIBUTES_FLAG_NOTIF BIT(30)
133
134#define SCMI_RD_RESET_FLAG_ASYNC BIT(2)
135#define SCMI_RD_RESET_FLAG_ASSERT BIT(1)
136#define SCMI_RD_RESET_FLAG_CYCLE BIT(0)
137
138/**
139 * struct scmi_rd_attr_in - Payload for RESET_DOMAIN_ATTRIBUTES message
140 * @domain_id: SCMI reset domain ID
141 */
142struct scmi_rd_attr_in {
143 u32 domain_id;
144};
145
146/**
147 * struct scmi_rd_attr_out - Payload for RESET_DOMAIN_ATTRIBUTES response
148 * @status: SCMI command status
149 * @attributes: Retrieved attributes of the reset domain
150 * @latency: Reset cycle max lantency
151 * @name: Reset domain name
152 */
153struct scmi_rd_attr_out {
154 s32 status;
155 u32 attributes;
156 u32 latency;
157 char name[SCMI_RD_NAME_LEN];
158};
159
160/**
161 * struct scmi_rd_reset_in - Message payload for RESET command
162 * @domain_id: SCMI reset domain ID
163 * @flags: Flags for the reset request
164 * @reset_state: Reset target state
165 */
166struct scmi_rd_reset_in {
167 u32 domain_id;
168 u32 flags;
169 u32 reset_state;
170};
171
172/**
173 * struct scmi_rd_reset_out - Response payload for RESET command
174 * @status: SCMI command status
175 */
176struct scmi_rd_reset_out {
177 s32 status;
178};
179
Etienne Carriere1f213ee2021-03-08 22:38:06 +0100180/*
181 * SCMI Voltage Domain Protocol
182 */
183
184enum scmi_voltage_domain_message_id {
185 SCMI_VOLTAGE_DOMAIN_ATTRIBUTES = 0x3,
186 SCMI_VOLTAGE_DOMAIN_CONFIG_SET = 0x5,
187 SCMI_VOLTAGE_DOMAIN_CONFIG_GET = 0x6,
188 SCMI_VOLTAGE_DOMAIN_LEVEL_SET = 0x7,
189 SCMI_VOLTAGE_DOMAIN_LEVEL_GET = 0x8,
190};
191
192#define SCMI_VOLTD_NAME_LEN 16
193
194#define SCMI_VOLTD_CONFIG_MASK GENMASK(3, 0)
195#define SCMI_VOLTD_CONFIG_OFF 0
196#define SCMI_VOLTD_CONFIG_ON 0x7
197
198/**
199 * struct scmi_voltd_attr_in - Payload for VOLTAGE_DOMAIN_ATTRIBUTES message
200 * @domain_id: SCMI voltage domain ID
201 */
202struct scmi_voltd_attr_in {
203 u32 domain_id;
204};
205
206/**
207 * struct scmi_voltd_attr_out - Payload for VOLTAGE_DOMAIN_ATTRIBUTES response
208 * @status: SCMI command status
209 * @attributes: Retrieved attributes of the voltage domain
210 * @name: Voltage domain name
211 */
212struct scmi_voltd_attr_out {
213 s32 status;
214 u32 attributes;
215 char name[SCMI_VOLTD_NAME_LEN];
216};
217
218/**
219 * struct scmi_voltd_config_set_in - Message payload for VOLTAGE_CONFIG_SET cmd
220 * @domain_id: SCMI voltage domain ID
221 * @config: Configuration data of the voltage domain
222 */
223struct scmi_voltd_config_set_in {
224 u32 domain_id;
225 u32 config;
226};
227
228/**
229 * struct scmi_voltd_config_set_out - Response for VOLTAGE_CONFIG_SET command
230 * @status: SCMI command status
231 */
232struct scmi_voltd_config_set_out {
233 s32 status;
234};
235
236/**
237 * struct scmi_voltd_config_get_in - Message payload for VOLTAGE_CONFIG_GET cmd
238 * @domain_id: SCMI voltage domain ID
239 */
240struct scmi_voltd_config_get_in {
241 u32 domain_id;
242};
243
244/**
245 * struct scmi_voltd_config_get_out - Response for VOLTAGE_CONFIG_GET command
246 * @status: SCMI command status
247 * @config: Configuration data of the voltage domain
248 */
249struct scmi_voltd_config_get_out {
250 s32 status;
251 u32 config;
252};
253
254/**
255 * struct scmi_voltd_level_set_in - Message payload for VOLTAGE_LEVEL_SET cmd
256 * @domain_id: SCMI voltage domain ID
257 * @flags: Parameter flags for configuring target level
258 * @voltage_level: Target voltage level in microvolts (uV)
259 */
260struct scmi_voltd_level_set_in {
261 u32 domain_id;
262 u32 flags;
263 s32 voltage_level;
264};
265
266/**
267 * struct scmi_voltd_level_set_out - Response for VOLTAGE_LEVEL_SET command
268 * @status: SCMI command status
269 */
270struct scmi_voltd_level_set_out {
271 s32 status;
272};
273
274/**
275 * struct scmi_voltd_level_get_in - Message payload for VOLTAGE_LEVEL_GET cmd
276 * @domain_id: SCMI voltage domain ID
277 */
278struct scmi_voltd_level_get_in {
279 u32 domain_id;
280};
281
282/**
283 * struct scmi_voltd_level_get_out - Response for VOLTAGE_LEVEL_GET command
284 * @status: SCMI command status
285 * @voltage_level: Voltage level in microvolts (uV)
286 */
287struct scmi_voltd_level_get_out {
288 s32 status;
289 s32 voltage_level;
290};
291
Etienne Carriere358599e2020-09-09 18:44:00 +0200292#endif /* _SCMI_PROTOCOLS_H */