| Marcel Ziswiler | ed7bda5 | 2022-11-07 22:22:37 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
| 2 | /* |
| 3 | * Copyright 2021 NXP |
| 4 | */ |
| 5 | |
| 6 | #ifndef __DT_BINDINGS_IMX8ULP_POWER_H__ |
| 7 | #define __DT_BINDINGS_IMX8ULP_POWER_H__ |
| 8 | |
| 9 | #define IMX8ULP_PD_DMA1 0 |
| 10 | #define IMX8ULP_PD_FLEXSPI2 1 |
| 11 | #define IMX8ULP_PD_USB0 2 |
| 12 | #define IMX8ULP_PD_USDHC0 3 |
| 13 | #define IMX8ULP_PD_USDHC1 4 |
| 14 | #define IMX8ULP_PD_USDHC2_USB1 5 |
| 15 | #define IMX8ULP_PD_DCNANO 6 |
| 16 | #define IMX8ULP_PD_EPDC 7 |
| 17 | #define IMX8ULP_PD_DMA2 8 |
| 18 | #define IMX8ULP_PD_GPU2D 9 |
| 19 | #define IMX8ULP_PD_GPU3D 10 |
| 20 | #define IMX8ULP_PD_HIFI4 11 |
| 21 | #define IMX8ULP_PD_ISI 12 |
| 22 | #define IMX8ULP_PD_MIPI_CSI 13 |
| 23 | #define IMX8ULP_PD_MIPI_DSI 14 |
| 24 | #define IMX8ULP_PD_PXP 15 |
| 25 | |
| 26 | #endif |