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Hannes Petermaier893c04e2014-02-07 08:07:36 +01001/*
2 * bur_am335x_common.h
3 *
4 * common parts used by B&R AM335x based boards
5 *
Hannes Schmelzer3b804d92016-02-19 12:09:45 +01006 * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
Hannes Petermaier893c04e2014-02-07 08:07:36 +01007 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __BUR_AM335X_COMMON_H__
13#define __BUR_AM335X_COMMON_H__
14/* ------------------------------------------------------------------------- */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010015#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
16
17/* Timer information */
18#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
19#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010020#define CONFIG_POWER_TPS65217
21
Hannes Petermaier893c04e2014-02-07 08:07:36 +010022#include <asm/arch/omap.h>
23
24/* NS16550 Configuration */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010025#define CONFIG_SYS_NS16550_SERIAL
26#define CONFIG_SYS_NS16550_REG_SIZE (-4)
27#define CONFIG_SYS_NS16550_CLK 48000000
28#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010029
30/* Network defines */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010031#define CONFIG_MII /* Required in net/eth.c */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010032#define CONFIG_PHY_NATSEMI
Hannes Schmelzer3b804d92016-02-19 12:09:45 +010033
Hannes Petermaier893c04e2014-02-07 08:07:36 +010034/*
35 * SPL related defines. The Public RAM memory map the ROM defines the
36 * area between 0x402F0400 and 0x4030B800 as a download area and
37 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
38 * supports X-MODEM loading via UART, and we leverage this and then use
Tom Rinifa2f81b2016-08-26 13:30:43 -040039 * Y-MODEM to load u-boot.img, when booted over UART. We must also include
40 * the scratch space that U-Boot uses in SRAM.
Hannes Petermaier893c04e2014-02-07 08:07:36 +010041 */
42#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom Rinifa2f81b2016-08-26 13:30:43 -040043#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
44 CONFIG_SPL_TEXT_BASE)
Hannes Petermaier893c04e2014-02-07 08:07:36 +010045
46/*
47 * Since SPL did pll and ddr initialization for us,
48 * we don't need to do it twice.
49 */
50#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
51#define CONFIG_SKIP_LOWLEVEL_INIT
52#endif /* !CONFIG_SPL_BUILD, ... */
53/*
54 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
55 * relocated itself to higher in memory by the time this value is used.
56 */
57#define CONFIG_SYS_LOAD_ADDR 0x80000000
58/*
59 * ----------------------------------------------------------------------------
60 * DDR information. We say (for simplicity) that we have 1 bank,
61 * always, even when we have more. We always start at 0x80000000,
62 * and we place the initial stack pointer in our SRAM.
63 */
64#define CONFIG_NR_DRAM_BANKS 1
65#define CONFIG_SYS_SDRAM_BASE 0x80000000
66#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
67 GENERATED_GBL_DATA_SIZE)
68
69/* I2C */
70#define CONFIG_SYS_I2C
Hannes Petermaier893c04e2014-02-07 08:07:36 +010071
72/*
73 * Our platforms make use of SPL to initalize the hardware (primarily
74 * memory) enough for full U-Boot to be loaded. We also support Falcon
75 * Mode so that the Linux kernel can be booted directly from SPL
76 * instead, if desired. We make use of the general SPL framework found
77 * under common/spl/. Given our generally common memory map, we set a
78 * number of related defaults and sizes here.
79 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010080/*
81 * Place the image at the start of the ROM defined image space.
82 * We limit our size to the ROM-defined downloaded image area, and use the
83 * rest of the space for stack. We load U-Boot itself into memory at
84 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
85 * have our BSS be placed 1MiB after this, to allow for the default
86 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
87 * We have the SPL malloc pool at the end of the BSS area.
88 *
89 * ----------------------------------------------------------------------------
90 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010091#define CONFIG_SPL_BSS_START_ADDR 0x80A00000
92#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
93#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
94 CONFIG_SPL_BSS_MAX_SIZE)
95#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
96
97/* General parts of the framework, required. */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010098
99#endif /* ! __BUR_AM335X_COMMON_H__ */