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Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +09001/*
2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (C) 2012 Renesas Solutions Corp.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +09006 */
7
8#ifndef __KZM9G_H
9#define __KZM9G_H
10
11#undef DEBUG
12
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090013#define CONFIG_SH73A0
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090015#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
16
17#include <asm/arch/rmobile.h>
18
19#define CONFIG_ARCH_CPU_INIT
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090020
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090021#define CONFIG_CMDLINE_TAG
22#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090024
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090025#undef CONFIG_SHOW_BOOT_PROGRESS
26
27/* MEMORY */
28#define KZM_SDRAM_BASE (0x40000000)
29#define PHYS_SDRAM KZM_SDRAM_BASE
30#define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
31#define CONFIG_NR_DRAM_BANKS (1)
32
33/* NOR Flash */
34#define KZM_FLASH_BASE (0x00000000)
35#define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
36#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
37#define CONFIG_SYS_MAX_FLASH_BANKS (1)
38#define CONFIG_SYS_MAX_FLASH_SECT (512)
39
40/* prompt */
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090041#define CONFIG_SYS_PBSIZE 256
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090042#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
43
44/* SCIF */
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090045#define CONFIG_CONS_SCIF4
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090046
47#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
48#define CONFIG_SYS_MEMTEST_END \
49 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090050#undef CONFIG_SYS_MEMTEST_SCRATCH
51#undef CONFIG_SYS_LOADS_BAUD_CHANGE
52
53#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
54#define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
55#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
56#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
57 CONFIG_SYS_INIT_RAM_SIZE - \
58 GENERATED_GBL_DATA_SIZE)
Tetsuyuki Kobayashi9415cf92012-07-05 01:43:44 +000059#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
60#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
61#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090062#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
63
64#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
65#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090066#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
67
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090068#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
69
70/* FLASH */
71#define CONFIG_FLASH_CFI_DRIVER
72#define CONFIG_SYS_FLASH_CFI
73#undef CONFIG_SYS_FLASH_QUIET_TEST
74#define CONFIG_SYS_FLASH_EMPTY_INFO
75#define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
76#define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE
77#define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE
78#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
79
80/* Timeout for Flash erase operations (in ms) */
81#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
82/* Timeout for Flash write operations (in ms) */
83#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
84/* Timeout for Flash set sector lock bit operations (in ms) */
85#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
86/* Timeout for Flash clear lock bit operations (in ms) */
87#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
88
89#undef CONFIG_SYS_FLASH_PROTECTION
90#undef CONFIG_SYS_DIRECT_FLASH_TFTP
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090091
92/* GPIO / PFC */
93#define CONFIG_SH_GPIO_PFC
94
95/* Clock */
Nobuhiro Iwamatsueae6c8a2012-08-03 13:56:52 +090096#define CONFIG_GLOBAL_TIMER
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +090097#define CONFIG_SYS_CLK_FREQ (48000000)
98#define CONFIG_SYS_CPU_CLK (1196000000)
Nobuhiro Iwamatsu59562ff2013-09-30 10:30:40 +090099#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +0900100#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +0900101
Tetsuyuki Kobayashi38263df2012-07-25 18:24:18 +0000102#define CONFIG_NFS_TIMEOUT 10000UL
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +0900103
104/* I2C */
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +0900105#define CONFIG_SYS_I2C
106#define CONFIG_SYS_I2C_SH
107#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
108#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
109#define CONFIG_SYS_I2C_SH_SPEED0 100000
110#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
111#define CONFIG_SYS_I2C_SH_SPEED1 100000
112#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
113#define CONFIG_SYS_I2C_SH_SPEED2 100000
114#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
115#define CONFIG_SYS_I2C_SH_SPEED3 100000
116#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
117#define CONFIG_SYS_I2C_SH_SPEED4 100000
Tetsuyuki Kobayashib1af67f2012-09-13 19:07:56 +0000118#define CONFIG_SH_I2C_8BIT
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +0900119#define CONFIG_SH_I2C_DATA_HIGH 4
120#define CONFIG_SH_I2C_DATA_LOW 5
121#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
Nobuhiro Iwamatsu8d811ca2012-06-21 14:55:07 +0900122
123#endif /* __KZM9G_H */