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Ye Li22172f62019-10-15 02:15:18 -07001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019 NXP
4 */
5
6#ifndef PCA9450_H_
7#define PCA9450_H_
8
9#define PCA9450_REGULATOR_DRIVER "pca9450_regulator"
10
11enum {
12 PCA9450_REG_DEV_ID = 0x00,
13 PCA9450_INT1 = 0x01,
14 PCA9450_INT1_MSK = 0x02,
15 PCA9450_STATUS1 = 0x03,
16 PCA9450_STATUS2 = 0x04,
17 PCA9450_PWRON_STAT = 0x05,
18 PCA9450_SW_RST = 0x06,
19 PCA9450_PWR_CTRL = 0x07,
20 PCA9450_RESET_CTRL = 0x08,
21 PCA9450_CONFIG1 = 0x09,
22 PCA9450_CONFIG2 = 0x0A,
23 PCA9450_BUCK123_DVS = 0x0C,
24 PCA9450_BUCK1OUT_LIMIT = 0x0D,
25 PCA9450_BUCK2OUT_LIMIT = 0x0E,
26 PCA9450_BUCK3OUT_LIMIT = 0x0F,
27 PCA9450_BUCK1CTRL = 0x10,
28 PCA9450_BUCK1OUT_DVS0 = 0x11,
29 PCA9450_BUCK1OUT_DVS1 = 0x12,
30 PCA9450_BUCK2CTRL = 0x13,
31 PCA9450_BUCK2OUT_DVS0 = 0x14,
32 PCA9450_BUCK2OUT_DVS1 = 0x15,
33 PCA9450_BUCK3CTRL = 0x16,
34 PCA9450_BUCK3OUT_DVS0 = 0x17,
35 PCA9450_BUCK3OUT_DVS1 = 0x18,
36 PCA9450_BUCK4CTRL = 0x19,
37 PCA9450_BUCK4OUT = 0x1A,
38 PCA9450_BUCK5CTRL = 0x1B,
39 PCA9450_BUCK5OUT = 0x1C,
40 PCA9450_BUCK6CTRL = 0x1D,
41 PCA9450_BUCK6OUT = 0x1E,
42 PCA9450_LDO_AD_CTRL = 0x20,
43 PCA9450_LDO1CTRL = 0x21,
44 PCA9450_LDO2CTRL = 0x22,
45 PCA9450_LDO3CTRL = 0x23,
46 PCA9450_LDO4CTRL = 0x24,
47 PCA9450_LDO5CTRL_L = 0x25,
48 PCA9450_LDO5CTRL_H = 0x26,
49 PCA9450_LOADSW_CTRL = 0x2A,
50 PCA9450_VRFLT1_STS = 0x2B,
51 PCA9450_VRFLT2_STS = 0x2C,
52 PCA9450_VRFLT1_MASK = 0x2D,
53 PCA9450_VRFLT2_MASK = 0x2E,
54 PCA9450_REG_NUM,
55};
56
Peng Fan4eeb9fe2021-03-19 15:57:06 +080057int power_pca9450_init(unsigned char bus, unsigned char addr);
Ye Li22172f62019-10-15 02:15:18 -070058
Marek Vasut326337f2022-05-20 05:10:17 +020059enum {
60 NXP_CHIP_TYPE_PCA9450A = 0,
61 NXP_CHIP_TYPE_PCA9450BC,
62 NXP_CHIP_TYPE_AMOUNT
63};
64
65#define PCA9450_DVS_BUCK_RUN_MASK 0x7f
66#define PCA9450_LDO12_MASK 0x07
67#define PCA9450_LDO34_MASK 0x1f
68#define PCA9450_LDO5_MASK 0x0f
69
Ye Li22172f62019-10-15 02:15:18 -070070#endif