wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Author : Hamid Ikdoumi (Atmel) |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <at91rm9200_net.h> |
| 25 | #include <net.h> |
| 26 | #include <dm9161.h> |
| 27 | |
| 28 | #ifdef CONFIG_DRIVER_ETHER |
| 29 | |
Jon Loeliger | 3a1ed1e | 2007-07-09 18:57:22 -0500 | [diff] [blame^] | 30 | #if defined(CONFIG_CMD_NET) |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 31 | |
| 32 | /* |
| 33 | * Name: |
| 34 | * dm9161_IsPhyConnected |
| 35 | * Description: |
| 36 | * Reads the 2 PHY ID registers |
| 37 | * Arguments: |
| 38 | * p_mac - pointer to AT91S_EMAC struct |
| 39 | * Return value: |
| 40 | * TRUE - if id read successfully |
| 41 | * FALSE- if error |
| 42 | */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 43 | unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac) |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 44 | { |
| 45 | unsigned short Id1, Id2; |
| 46 | |
| 47 | at91rm9200_EmacEnableMDIO (p_mac); |
| 48 | at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID1, &Id1); |
| 49 | at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID2, &Id2); |
| 50 | at91rm9200_EmacDisableMDIO (p_mac); |
| 51 | |
| 52 | if ((Id1 == (DM9161_PHYID1_OUI >> 6)) && |
| 53 | ((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK))) |
| 54 | return TRUE; |
| 55 | |
| 56 | return FALSE; |
| 57 | } |
| 58 | |
| 59 | /* |
| 60 | * Name: |
| 61 | * dm9161_GetLinkSpeed |
| 62 | * Description: |
| 63 | * Link parallel detection status of MAC is checked and set in the |
| 64 | * MAC configuration registers |
| 65 | * Arguments: |
| 66 | * p_mac - pointer to MAC |
| 67 | * Return value: |
| 68 | * TRUE - if link status set succesfully |
| 69 | * FALSE - if link status not set |
| 70 | */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 71 | UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac) |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 72 | { |
| 73 | unsigned short stat1, stat2; |
| 74 | |
| 75 | if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &stat1)) |
| 76 | return FALSE; |
| 77 | |
| 78 | if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */ |
| 79 | return FALSE; |
| 80 | |
| 81 | if (!at91rm9200_EmacReadPhy (p_mac, DM9161_DSCSR, &stat2)) |
| 82 | return FALSE; |
| 83 | |
| 84 | if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) { |
| 85 | /*set Emac for 100BaseTX and Full Duplex */ |
| 86 | p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
| 87 | return TRUE; |
| 88 | } |
| 89 | |
| 90 | if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) { |
| 91 | /*set MII for 10BaseT and Full Duplex */ |
| 92 | p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
| 93 | ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
| 94 | | AT91C_EMAC_FD; |
| 95 | return TRUE; |
| 96 | } |
| 97 | |
| 98 | if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) { |
| 99 | /*set MII for 100BaseTX and Half Duplex */ |
| 100 | p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
| 101 | ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
| 102 | | AT91C_EMAC_SPD; |
| 103 | return TRUE; |
| 104 | } |
| 105 | |
| 106 | if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) { |
| 107 | /*set MII for 10BaseT and Half Duplex */ |
| 108 | p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); |
| 109 | return TRUE; |
| 110 | } |
| 111 | return FALSE; |
| 112 | } |
| 113 | |
| 114 | |
| 115 | /* |
| 116 | * Name: |
| 117 | * dm9161_InitPhy |
| 118 | * Description: |
| 119 | * MAC starts checking its link by using parallel detection and |
| 120 | * Autonegotiation and the same is set in the MAC configuration registers |
| 121 | * Arguments: |
| 122 | * p_mac - pointer to struct AT91S_EMAC |
| 123 | * Return value: |
| 124 | * TRUE - if link status set succesfully |
| 125 | * FALSE - if link status not set |
| 126 | */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 127 | UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac) |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 128 | { |
| 129 | UCHAR ret = TRUE; |
| 130 | unsigned short IntValue; |
| 131 | |
| 132 | at91rm9200_EmacEnableMDIO (p_mac); |
| 133 | |
| 134 | if (!dm9161_GetLinkSpeed (p_mac)) { |
| 135 | /* Try another time */ |
| 136 | ret = dm9161_GetLinkSpeed (p_mac); |
| 137 | } |
| 138 | |
| 139 | /* Disable PHY Interrupts */ |
| 140 | at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue); |
Wolfgang Denk | fef636b | 2005-10-05 01:54:04 +0200 | [diff] [blame] | 141 | /* set FDX, SPD, Link, INTR masks */ |
| 142 | IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK | |
| 143 | DM9161_LINK_MASK | DM9161_INTR_MASK); |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 144 | at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue); |
| 145 | at91rm9200_EmacDisableMDIO (p_mac); |
| 146 | |
| 147 | return (ret); |
| 148 | } |
| 149 | |
| 150 | |
| 151 | /* |
| 152 | * Name: |
| 153 | * dm9161_AutoNegotiate |
| 154 | * Description: |
| 155 | * MAC Autonegotiates with the partner status of same is set in the |
| 156 | * MAC configuration registers |
| 157 | * Arguments: |
| 158 | * dev - pointer to struct net_device |
| 159 | * Return value: |
| 160 | * TRUE - if link status set successfully |
| 161 | * FALSE - if link status not set |
| 162 | */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 163 | UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status) |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 164 | { |
| 165 | unsigned short value; |
| 166 | unsigned short PhyAnar; |
| 167 | unsigned short PhyAnalpar; |
| 168 | |
| 169 | /* Set dm9161 control register */ |
| 170 | if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
| 171 | return FALSE; |
| 172 | value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */ |
| 173 | value |= DM9161_ISOLATE; /* Electrically isolate PHY */ |
| 174 | if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
| 175 | return FALSE; |
| 176 | |
| 177 | /* Set the Auto_negotiation Advertisement Register */ |
| 178 | /* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ |
| 179 | PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX | |
| 180 | DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3; |
| 181 | if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar)) |
| 182 | return FALSE; |
| 183 | |
| 184 | /* Read the Control Register */ |
| 185 | if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
| 186 | return FALSE; |
| 187 | |
| 188 | value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE; |
| 189 | if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
| 190 | return FALSE; |
| 191 | /* Restart Auto_negotiation */ |
| 192 | value |= DM9161_RESTART_AUTONEG; |
Wolfgang Denk | fef636b | 2005-10-05 01:54:04 +0200 | [diff] [blame] | 193 | value &= ~DM9161_ISOLATE; |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 194 | if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
| 195 | return FALSE; |
| 196 | |
| 197 | /*check AutoNegotiate complete */ |
| 198 | udelay (10000); |
| 199 | at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &value); |
| 200 | if (!(value & DM9161_AUTONEG_COMP)) |
| 201 | return FALSE; |
| 202 | |
| 203 | /* Get the AutoNeg Link partner base page */ |
| 204 | if (!at91rm9200_EmacReadPhy (p_mac, DM9161_ANLPAR, &PhyAnalpar)) |
| 205 | return FALSE; |
| 206 | |
| 207 | if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) { |
| 208 | /*set MII for 100BaseTX and Full Duplex */ |
| 209 | p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
| 210 | return TRUE; |
| 211 | } |
| 212 | |
| 213 | if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) { |
| 214 | /*set MII for 10BaseT and Full Duplex */ |
| 215 | p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
| 216 | ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
| 217 | | AT91C_EMAC_FD; |
| 218 | return TRUE; |
| 219 | } |
| 220 | return FALSE; |
| 221 | } |
| 222 | |
Jon Loeliger | 3a1ed1e | 2007-07-09 18:57:22 -0500 | [diff] [blame^] | 223 | #endif |
wdenk | 429168e | 2004-08-02 23:39:03 +0000 | [diff] [blame] | 224 | |
| 225 | #endif /* CONFIG_DRIVER_ETHER */ |