Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | |
| 26 | /* |
| 27 | * CPU test |
| 28 | * Load/store multiple word instructions: lmw, stmw |
| 29 | * |
| 30 | * 26 consecutive words are loaded from a source memory buffer |
| 31 | * into GPRs r6 through r31. After that, 26 consecutive words are stored |
| 32 | * from the GPRs r6 through r31 into a target memory buffer. The contents |
| 33 | * of the source and target buffers are then compared. |
| 34 | */ |
| 35 | |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 36 | #include <post.h> |
| 37 | #include "cpu_asm.h" |
| 38 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 39 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 40 | |
| 41 | extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); |
| 42 | |
| 43 | int cpu_post_test_multi (void) |
| 44 | { |
| 45 | int ret = 0; |
| 46 | unsigned int i; |
Stefan Roese | f2302d4 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 47 | int flag = disable_interrupts(); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 48 | |
| 49 | if (ret == 0) |
| 50 | { |
| 51 | ulong src [26], dst [26]; |
| 52 | |
| 53 | ulong code[] = |
| 54 | { |
| 55 | ASM_LMW(5, 3, 0), |
| 56 | ASM_STMW(5, 4, 0), |
| 57 | ASM_BLR, |
| 58 | }; |
| 59 | |
Mike Frysinger | d239781 | 2011-05-10 07:28:35 +0000 | [diff] [blame] | 60 | for (i = 0; i < ARRAY_SIZE(src); ++i) |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 61 | { |
| 62 | src[i] = i; |
| 63 | dst[i] = 0; |
| 64 | } |
| 65 | |
| 66 | cpu_post_exec_02(code, (ulong)src, (ulong)dst); |
| 67 | |
| 68 | ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; |
| 69 | } |
| 70 | |
| 71 | if (ret != 0) |
| 72 | { |
| 73 | post_log ("Error at multi test !\n"); |
| 74 | } |
| 75 | |
Stefan Roese | f2302d4 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 76 | if (flag) |
| 77 | enable_interrupts(); |
| 78 | |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 79 | return ret; |
| 80 | } |
| 81 | |
| 82 | #endif |