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Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +02001/*
2 * am335x_sl50.h
3 *
4 * Copyright (C) 2015 Toby Churchill Ltd - http://www.toby-churchill.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_AM335X_EVM_H
10#define __CONFIG_AM335X_EVM_H
11
12#include <configs/ti_am335x_common.h>
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020013
14#ifndef CONFIG_SPL_BUILD
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020015# define CONFIG_TIMESTAMP
16# define CONFIG_LZO
17#endif
18
19#define CONFIG_SYS_BOOTM_LEN (16 << 20)
20
21/*#define CONFIG_MACH_TYPE 3589 Until the next sync */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020022
23/* Clock Defines */
24#define V_OSCK 24000000 /* Clock output from T2 */
25#define V_SCLK (V_OSCK)
26
27/* Always 128 KiB env size */
28#define CONFIG_ENV_SIZE (128 << 10)
29
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020030#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
31
32#ifndef CONFIG_SPL_BUILD
33
34#include <config_distro_defaults.h>
35
36#define MEM_LAYOUT_ENV_SETTINGS \
37 "scriptaddr=0x80000000\0" \
38 "pxefile_addr_r=0x80100000\0" \
39 "kernel_addr_r=0x82000000\0" \
40 "fdt_addr_r=0x88000000\0" \
41 "ramdisk_addr_r=0x88080000\0" \
42
43#define BOOT_TARGET_DEVICES(func) \
44 func(MMC, mmc, 0) \
45 func(MMC, mmc, 1)
46
47#define AM335XX_BOARD_FDTFILE \
48 "fdtfile=am335x-sl50.dtb\0" \
49
50#include <config_distro_bootcmd.h>
51
52#define CONFIG_EXTRA_ENV_SETTINGS \
53 AM335XX_BOARD_FDTFILE \
54 MEM_LAYOUT_ENV_SETTINGS \
55 BOOTENV
56
57#endif
58
59/* NS16550 Configuration */
60#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
61#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
62#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
63#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
64#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
65#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020066
67#define CONFIG_CMD_EEPROM
68#define CONFIG_ENV_EEPROM_IS_ON_I2C
69#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
70#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020071
72/* PMIC support */
73#define CONFIG_POWER_TPS65217
74#define CONFIG_POWER_TPS65910
75
76/* SPL */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020077
78/* Bootcount using the RTC block */
79#define CONFIG_BOOTCOUNT_LIMIT
80#define CONFIG_BOOTCOUNT_AM33XX
81#define CONFIG_SYS_BOOTCOUNT_BE
82
Lokesh Vutla3a517fd2017-04-26 13:37:07 +053083#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020084
85#ifndef CONFIG_SPL_USBETH_SUPPORT
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020086#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
87#endif
88
89#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
90/* Remove other SPL modes. */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020091#define CONFIG_ENV_IS_NOWHERE
92#undef CONFIG_ENV_IS_IN_NAND
93/* disable host part of MUSB in SPL */
94#undef CONFIG_MUSB_HOST
95/* disable EFI partitions and partition UUID support */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020096#endif
97
98#if defined(CONFIG_EMMC_BOOT)
99#undef CONFIG_ENV_IS_NOWHERE
100#define CONFIG_ENV_IS_IN_MMC
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +0200101#define CONFIG_SYS_MMC_ENV_DEV 1
102#define CONFIG_SYS_MMC_ENV_PART 2
103#define CONFIG_ENV_OFFSET 0x0
104#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
105#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
106#endif
107
108/* Network. */
109#define CONFIG_PHY_GIGE
110#define CONFIG_PHYLIB
111#define CONFIG_PHY_SMSC
112
113#endif /* ! __CONFIG_AM335X_SL50_H */