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Tom Rini83d290c2018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
Bin Meng65c4ac02015-04-27 23:22:24 +08002#
3# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
Bin Meng65c4ac02015-04-27 23:22:24 +08004
5if VENDOR_GOOGLE
6
Tom Rini2c58d2f2022-02-25 11:19:45 -05007config BIOSEMU
8 bool
Tom Rini3a581af2022-12-02 16:42:21 -05009 select X86EMU_RAW_IO
10
11config X86EMU_RAW_IO
12 bool
Tom Rini2c58d2f2022-02-25 11:19:45 -050013
Bin Meng65c4ac02015-04-27 23:22:24 +080014choice
15 prompt "Mainboard model"
Joe Hershbergera26cd042015-05-12 14:46:23 -050016 optional
Bin Meng65c4ac02015-04-27 23:22:24 +080017
Simon Glassa1d6dc32019-12-08 17:40:20 -070018config TARGET_CHROMEBOOK_CORAL
19 bool "Chromebook coral"
Tom Rini2c58d2f2022-02-25 11:19:45 -050020 select BIOSEMU
Simon Glassa1d6dc32019-12-08 17:40:20 -070021 help
22 This is a range of Intel-based laptops released in 2018. They use an
23 Intel Apollo Lake SoC. The design supports WiFi, 4GB to 16GB of
24 LPDDR4 1600MHz SDRAM, PCIe WiFi and Bluetooth, eMMC (typically 32GB),
25 up two cameras (front-facing 720p and another 5MP option), USB SD
26 reader, microphone and speakers. It also includes two USB 3 Type A and
27 two Type C ports. The latter are used as power input and can also
28 charge external devices as well as a 4K external display. There is a
29 Chrome OS EC connected on LPC, a Cr50 secure chip from Google and
30 various display options. OEMs products include Acer Chromebook 11
31 (e.g. C732, CB11, CP311) and Lenovo Chromebook (100e, 300e, 500e).
32
Bin Meng65c4ac02015-04-27 23:22:24 +080033config TARGET_CHROMEBOOK_LINK
34 bool "Chromebook link"
Tom Rini2c58d2f2022-02-25 11:19:45 -050035 select BIOSEMU
Bin Meng65c4ac02015-04-27 23:22:24 +080036 help
37 This is the Chromebook Pixel released in 2013. It uses an Intel
38 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
39 SDRAM. It has a Panther Point platform controller hub, PCIe
40 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
41 reader, microphone and speakers, display port and 32GB SATA
42 solid state drive. There is a Chrome OS EC connected on LPC,
43 and it provides a 2560x1700 high resolution touch-enabled LCD
44 display.
45
Simon Glassfda4eb42017-01-16 07:04:27 -070046config TARGET_CHROMEBOOK_LINK64
47 bool "Chromebook link 64-bit"
Tom Rini2c58d2f2022-02-25 11:19:45 -050048 select BIOSEMU
Simon Glassfda4eb42017-01-16 07:04:27 -070049 help
50 This is the Chromebook Pixel released in 2013. With this config
51 U-Boot is built as a 64-bit binary. This allows testing while this
52 feature is being completed.
53
Bin Meng65c4ac02015-04-27 23:22:24 +080054config TARGET_CHROMEBOX_PANTHER
55 bool "Chromebox panther (not available)"
Tom Rini2c58d2f2022-02-25 11:19:45 -050056 select BIOSEMU
Bin Meng65c4ac02015-04-27 23:22:24 +080057 help
58 Note: At present this must be used with coreboot. See README.x86
59 for instructions.
60
61 This is the Asus Chromebox CN60 released in 2014. It uses an Intel
62 Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a
63 Lynx Point platform controller hub, PCIe WiFi and Bluetooth. It also
64 includes a USB SD reader, four USB3 ports, display port and HDMI
65 video output and a 16GB SATA solid state drive. There is no Chrome
66 OS EC on this model.
67
Simon Glass374e78e2016-03-16 07:44:43 -060068config TARGET_CHROMEBOOK_SAMUS
69 bool "Chromebook samus"
70 help
71 This is the Chromebook Pixel released in 2015. It uses an Intel
72 Broadwell U Core i5 or Core i7 CPU with either 8GB or 16GB of
73 LPDDR3 SDRAM. It has PCIe WiFi and Bluetooth. It also includes a
74 720p webcam, USB SD reader, microphone and speakers, 2 USB 3 Type
75 C ports which can support charging and up to a 4K external display.
76 There is a solid state drive, either 32GB or 64GB. There is a
77 Chrome OS EC connected on LPC, and it provides a 2560x1700 high
78 resolution touch-enabled LCD display.
79
Simon Glassffe40372019-05-07 21:41:16 -060080config TARGET_CHROMEBOOK_SAMUS_TPL
81 bool "Chromebook samus booting from TPL"
82 help
83 This is a version of Samus which boots into TPL, then to SPL and
84 U-Boot proper. This is useful where verified boot must select
85 between different A/B versions of SPL/U-Boot, to allow upgrading of
86 almost all U-Boot code in the field.
87
Bin Meng65c4ac02015-04-27 23:22:24 +080088endchoice
89
Simon Glassa1d6dc32019-12-08 17:40:20 -070090source "board/google/chromebook_coral/Kconfig"
Bin Meng65c4ac02015-04-27 23:22:24 +080091source "board/google/chromebook_link/Kconfig"
92source "board/google/chromebox_panther/Kconfig"
Simon Glass374e78e2016-03-16 07:44:43 -060093source "board/google/chromebook_samus/Kconfig"
Bin Meng65c4ac02015-04-27 23:22:24 +080094
95endif