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Vaibhav Hiremathed01e452010-06-07 15:20:43 -04001/*
2 * am3517_evm.h - Default configuration for AM3517 EVM board.
3 *
4 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
5 *
6 * Based on omap3_evm_config.h
7 *
8 * Copyright (C) 2010 Texas Instruments Incorporated
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
Derald D. Woods3f53e612016-03-05 13:19:59 -060016/* High Level Configuration Options */
17
18#define CONFIG_OMAP
Derald D. Woods3f53e612016-03-05 13:19:59 -060019
Derald D. Woods3f53e612016-03-05 13:19:59 -060020#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
21
Nishanth Menonc6f90e12015-03-09 17:12:08 -050022/* Common ARM Erratas */
23#define CONFIG_ARM_ERRATA_454179
24#define CONFIG_ARM_ERRATA_430973
25#define CONFIG_ARM_ERRATA_621766
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040026
Vaibhav Hiremath1a5038c2010-06-07 15:20:53 -040027#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040028
Derald D. Woods3f53e612016-03-05 13:19:59 -060029/*
30 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
31 * 64 bytes before this address should be set aside for u-boot.img's
32 * header. That is 0x800FFFC0--0x80100000 should not be used for any
33 * other needs.
34 */
35#define CONFIG_SYS_TEXT_BASE 0x80100000
36#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
37#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
38
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040039#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050040#include <asm/arch/omap.h>
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040041
Derald D. Woods3f53e612016-03-05 13:19:59 -060042#define CONFIG_MISC_INIT_R
43#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS
45#define CONFIG_INITRD_TAG
46#define CONFIG_REVISION_TAG
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040047
48/* Clock Defines */
49#define V_OSCK 26000000 /* Clock output from T2 */
50#define V_SCLK (V_OSCK >> 1)
51
Derald D. Woods3f53e612016-03-05 13:19:59 -060052/* Size of malloc() pool */
53#define CONFIG_SYS_MALLOC_LEN (16 << 20)
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040054
Derald D. Woods3f53e612016-03-05 13:19:59 -060055/* Hardware drivers */
Yegor Yefremov0a0db402015-07-27 11:10:58 +020056
Derald D. Woods3f53e612016-03-05 13:19:59 -060057/* OMAP GPIO configuration */
Yegor Yefremov6a1df372013-12-11 15:41:11 +010058#define CONFIG_OMAP_GPIO
59
Derald D. Woods3f53e612016-03-05 13:19:59 -060060/* NS16550 Configuration */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040061#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040062#define CONFIG_SYS_NS16550_SERIAL
63#define CONFIG_SYS_NS16550_REG_SIZE (-4)
64#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
65
Derald D. Woods3f53e612016-03-05 13:19:59 -060066/* select serial console configuration */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040067#define CONFIG_CONS_INDEX 3
68#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
69#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
70
71/* allow to overwrite serial and ethaddr */
72#define CONFIG_ENV_OVERWRITE
73#define CONFIG_BAUDRATE 115200
74#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
75 115200}
Derald D. Woods3f53e612016-03-05 13:19:59 -060076
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053077/*
78 * USB configuration
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020079 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
80 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053081 */
Ilya Yanok88919ff2012-11-06 13:48:28 +000082#define CONFIG_USB_MUSB_AM35X
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020083#define CONFIG_USB_MUSB_PIO_ONLY
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053084
Ilya Yanok88919ff2012-11-06 13:48:28 +000085#ifdef CONFIG_USB_MUSB_AM35X
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053086
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020087#ifdef CONFIG_USB_MUSB_HOST
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053088
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053089#ifdef CONFIG_USB_KEYBOARD
90#define CONFIG_SYS_USB_EVENT_POLL
91#define CONFIG_PREBOOT "usb start"
92#endif /* CONFIG_USB_KEYBOARD */
93
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020094#endif /* CONFIG_USB_MUSB_HOST */
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053095
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020096#ifdef CONFIG_USB_MUSB_GADGET
Ilya Yanok88919ff2012-11-06 13:48:28 +000097#define CONFIG_USB_ETHER
98#define CONFIG_USB_ETH_RNDIS
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020099#endif /* CONFIG_USB_MUSB_GADGET */
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +0530100
Ilya Yanok88919ff2012-11-06 13:48:28 +0000101#endif /* CONFIG_USB_MUSB_AM35X */
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +0530102
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400103/* commands to include */
Derald D. Woods3f53e612016-03-05 13:19:59 -0600104#define CONFIG_CMD_NAND
Derald D. Woods3f53e612016-03-05 13:19:59 -0600105#define CONFIG_CMD_MTDPARTS
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400106
Derald D. Woods3f53e612016-03-05 13:19:59 -0600107/* I2C */
Heiko Schocher6789e842013-10-22 11:03:18 +0200108#define CONFIG_SYS_I2C
109#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
110#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
111#define CONFIG_SYS_I2C_OMAP34XX
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400112
Derald D. Woods3f53e612016-03-05 13:19:59 -0600113/* Ethernet */
Tom Rini18a02e82011-12-06 08:49:41 -0700114#define CONFIG_DRIVER_TI_EMAC
115#define CONFIG_DRIVER_TI_EMAC_USE_RMII
116#define CONFIG_MII
117#define CONFIG_BOOTP_DEFAULT
118#define CONFIG_BOOTP_DNS
119#define CONFIG_BOOTP_DNS2
120#define CONFIG_BOOTP_SEND_HOSTNAME
121#define CONFIG_NET_RETRY_COUNT 10
122
Derald D. Woods3f53e612016-03-05 13:19:59 -0600123/* Board NAND Info. */
124#ifdef CONFIG_NAND
125#define CONFIG_NAND_OMAP_GPMC
126#define CONFIG_NAND_OMAP_GPMC_PREFETCH
127#define CONFIG_BCH
Derald D. Woods3f53e612016-03-05 13:19:59 -0600128#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
129#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
130#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400131#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
132 /* to access nand */
133#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
134 /* to access */
135 /* nand at CS0 */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400136#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
137 /* NAND devices */
Derald D. Woods138daa72016-03-05 13:19:58 -0600138#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Tom Rini5059a2a2011-11-18 12:48:10 +0000139#define CONFIG_SYS_NAND_5_ADDR_CYCLE
140#define CONFIG_SYS_NAND_PAGE_COUNT 64
141#define CONFIG_SYS_NAND_PAGE_SIZE 2048
142#define CONFIG_SYS_NAND_OOBSIZE 64
Derald D. Woods138daa72016-03-05 13:19:58 -0600143#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
Tom Rini5059a2a2011-11-18 12:48:10 +0000144#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
Derald D. Woods138daa72016-03-05 13:19:58 -0600145#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
146 11, 12, 13, 14, 16, 17, 18, 19, 20, \
147 21, 22, 23, 24, 25, 26, 27, 28, 30, \
148 31, 32, 33, 34, 35, 36, 37, 38, 39, \
149 40, 41, 42, 44, 45, 46, 47, 48, 49, \
150 50, 51, 52, 53, 54, 55, 56 }
151
Tom Rini5059a2a2011-11-18 12:48:10 +0000152#define CONFIG_SYS_NAND_ECCSIZE 512
Derald D. Woods138daa72016-03-05 13:19:58 -0600153#define CONFIG_SYS_NAND_ECCBYTES 13
154#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
155#define CONFIG_SYS_NAND_MAX_OOBFREE 2
156#define CONFIG_SYS_NAND_MAX_ECCPOS 56
Tom Rini5059a2a2011-11-18 12:48:10 +0000157#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
158#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
Derald D. Woods3f53e612016-03-05 13:19:59 -0600159#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
160#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
161/* NAND block size is 128 KiB. Synchronize these values with
162 * corresponding Device Tree entries in Linux:
163 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
164 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
165 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
166 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
167 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
168 * RootFS Remaining Flash Space @ 0xB20000
169 */
170#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
171#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
172 "512k(MLO)," \
173 "1920k(u-boot)," \
174 "256k(u-boot-env)," \
175 "8m(kernel)," \
176 "512k(dtb)," \
177 "-(rootfs)"
178#else
179#define MTDIDS_DEFAULT
180#define MTDPARTS_DEFAULT
181#endif /* CONFIG_NAND */
182
183/* Environment information */
Derald D. Woods3f53e612016-03-05 13:19:59 -0600184
185#define CONFIG_BOOTFILE "uImage"
186
187#define CONFIG_EXTRA_ENV_SETTINGS \
188 "loadaddr=0x82000000\0" \
189 "console=ttyO2,115200n8\0" \
190 "fdtfile=am3517-evm.dtb\0" \
191 "fdtaddr=0x82C00000\0" \
192 "vram=16M\0" \
193 "bootenv=uEnv.txt\0" \
194 "cmdline=\0" \
195 "optargs=\0" \
196 "mtdids=" MTDIDS_DEFAULT "\0" \
197 "mtdparts=" MTDPARTS_DEFAULT "\0" \
198 "mmcdev=0\0" \
199 "mmcpart=1\0" \
200 "mmcroot=/dev/mmcblk0p2 rw\0" \
201 "mmcrootfstype=ext4 rootwait fixrtc\0" \
202 "mmcargs=setenv bootargs console=${console} " \
203 "${mtdparts} " \
204 "${optargs} " \
205 "root=${mmcroot} " \
206 "rootfstype=${mmcrootfstype} " \
207 "${cmdline}\0" \
208 "nandargs=setenv bootargs console=${console} " \
209 "${mtdparts} " \
210 "${optargs} " \
211 "root=ubi0:rootfs rw ubi.mtd=rootfs " \
212 "rootfstype=ubifs rootwait " \
213 "${cmdline}\0" \
214 "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
215 "importbootenv=echo Importing environment from mmc ...; " \
216 "env import -t ${loadaddr} ${filesize}\0" \
217 "bootscript=echo Running bootscript from mmc ...; " \
218 "source ${loadaddr}\0" \
219 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
220 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
221 "mmcboot=echo Booting from mmc ...; " \
222 "run mmcargs; " \
223 "bootz ${loadaddr} - ${fdtaddr}\0" \
224 "nandboot=echo Booting from nand ...; " \
225 "run nandargs; " \
226 "nand read ${loadaddr} 2a0000 800000; " \
227 "nand read ${fdtaddr} aa0000 80000; " \
228 "bootm ${loadaddr} - ${fdtaddr}\0" \
229
230#define CONFIG_BOOTCOMMAND \
231 "mmc dev ${mmcdev}; if mmc rescan; then " \
232 "echo SD/MMC found on device $mmcdev; " \
233 "if run loadbootenv; then " \
234 "run importbootenv; " \
235 "fi; " \
236 "echo Checking if uenvcmd is set ...; " \
237 "if test -n $uenvcmd; then " \
238 "echo Running uenvcmd ...; " \
239 "run uenvcmd; " \
240 "fi; " \
241 "echo Running default loadimage ...; " \
242 "setenv bootfile zImage; " \
243 "if run loadimage; then " \
244 "run loadfdt; " \
245 "run mmcboot; " \
246 "fi; " \
247 "else run nandboot; fi"
248
249/* Miscellaneous configurable options */
250#define CONFIG_AUTO_COMPLETE
251#define CONFIG_CMDLINE_EDITING
Derald D. Woods3f53e612016-03-05 13:19:59 -0600252#define CONFIG_SYS_LONGHELP
Derald D. Woods3f53e612016-03-05 13:19:59 -0600253
254/* We set the max number of command args high to avoid HUSH bugs. */
255#define CONFIG_SYS_MAXARGS 64
256
257/* Console I/O Buffer Size */
258#define CONFIG_SYS_CBSIZE 512
259/* Print Buffer Size */
260#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
261 + sizeof(CONFIG_SYS_PROMPT) + 16)
262/* Boot Argument Buffer Size */
263#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
264
265/* memtest works on */
266#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
267#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
268 0x01F00000) /* 31MB */
269
270#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
271 /* address */
Tom Rini5059a2a2011-11-18 12:48:10 +0000272
273/*
Derald D. Woods3f53e612016-03-05 13:19:59 -0600274 * AM3517 has 12 GP timers, they can be driven by the system clock
275 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
276 * This rate is divided by a local divisor.
Tom Rini5059a2a2011-11-18 12:48:10 +0000277 */
Derald D. Woods3f53e612016-03-05 13:19:59 -0600278#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
279#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
280
281/* Physical Memory Map */
282#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
283#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
284#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
285#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
286#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
287#define CONFIG_SYS_INIT_RAM_SIZE 0x800
288#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
289 CONFIG_SYS_INIT_RAM_SIZE - \
290 GENERATED_GBL_DATA_SIZE)
291
292/* FLASH and environment organization */
293
294/* **** PISMO SUPPORT *** */
295#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
296 /* on one chip */
297#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
298#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
299
300#if defined(CONFIG_NAND)
301#define CONFIG_SYS_FLASH_BASE NAND_BASE
302#endif
303
304/* Monitor at start of flash */
305#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
306
307#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
308#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
309#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
310#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
311#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
312#define CONFIG_ENV_IS_IN_NAND
313
314/* Defines for SPL */
315#define CONFIG_SPL_FRAMEWORK
316#define CONFIG_SPL_BOARD_INIT
317#define CONFIG_SPL_NAND_SIMPLE
318#define CONFIG_SPL_TEXT_BASE 0x40200000
Tom Rinifa2f81b2016-08-26 13:30:43 -0400319#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
320 CONFIG_SPL_TEXT_BASE)
Derald D. Woods3f53e612016-03-05 13:19:59 -0600321
322#define CONFIG_SPL_BSS_START_ADDR 0x80000000
323#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
324
Derald D. Woods3f53e612016-03-05 13:19:59 -0600325#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
326#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
327
Derald D. Woods3f53e612016-03-05 13:19:59 -0600328#define CONFIG_SPL_NAND_BASE
329#define CONFIG_SPL_NAND_DRIVERS
330#define CONFIG_SPL_NAND_ECC
Tom Rini983e3702016-11-07 21:34:54 -0500331#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
Tom Rini5059a2a2011-11-18 12:48:10 +0000332
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400333#endif /* __CONFIG_H */