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Haavard Skinnemoendf548d32006-11-19 18:06:53 +01001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#ifndef __ASM_AVR32_ARCH_CLK_H__
23#define __ASM_AVR32_ARCH_CLK_H__
24
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010025#include <asm/arch/chip-features.h>
26
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010027#ifdef CONFIG_PLL
28#define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL)
29#else
30#define MAIN_CLK_RATE (CFG_OSC0_HZ)
31#endif
32
33static inline unsigned long get_cpu_clk_rate(void)
34{
35 return MAIN_CLK_RATE >> CFG_CLKDIV_CPU;
36}
37static inline unsigned long get_hsb_clk_rate(void)
38{
39 return MAIN_CLK_RATE >> CFG_CLKDIV_HSB;
40}
41static inline unsigned long get_pba_clk_rate(void)
42{
43 return MAIN_CLK_RATE >> CFG_CLKDIV_PBA;
44}
45static inline unsigned long get_pbb_clk_rate(void)
46{
47 return MAIN_CLK_RATE >> CFG_CLKDIV_PBB;
48}
49
50/* Accessors for specific devices. More will be added as needed. */
51static inline unsigned long get_sdram_clk_rate(void)
52{
53 return get_hsb_clk_rate();
54}
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010055#ifdef AT32AP700x_CHIP_HAS_USART
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010056static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
57{
58 return get_pba_clk_rate();
59}
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010060#endif
Haavard Skinnemoencdd42c02008-04-30 13:09:56 +020061#ifdef AT32AP700x_CHIP_HAS_MACB
Haavard Skinnemoenb4ec9c22006-12-17 16:56:14 +010062static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
63{
64 return get_pbb_clk_rate();
65}
66static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
67{
68 return get_hsb_clk_rate();
69}
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010070#endif
71#ifdef AT32AP700x_CHIP_HAS_MMCI
Haavard Skinnemoen05fdab12006-12-17 18:55:37 +010072static inline unsigned long get_mci_clk_rate(void)
73{
74 return get_pbb_clk_rate();
75}
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010076#endif
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010077
Haavard Skinnemoen3ace2522008-05-02 15:21:40 +020078extern void clk_init(void);
79
Haavard Skinnemoend38da532008-01-23 17:20:14 +010080/* Board code may need the SDRAM base clock as a compile-time constant */
81#define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
82
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010083#endif /* __ASM_AVR32_ARCH_CLK_H__ */