blob: dec6230ad5cd6ca835a4d0f8b8c07906da74fa3f [file] [log] [blame]
Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jinece92f82007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala4c2e3da2009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jinece92f82007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jinece92f82007-07-06 08:34:56 +080036*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jinece92f82007-07-06 08:34:56 +080040*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jinece92f82007-07-06 08:34:56 +080043*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jinece92f82007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glass4c59f952014-11-14 20:56:40 -070049#include <bios_emul.h>
50#include <errno.h>
Jason Jinece92f82007-07-06 08:34:56 +080051#include <malloc.h>
Simon Glass4c59f952014-11-14 20:56:40 -070052#include <vbe.h>
53#include "biosemui.h"
Jason Jinece92f82007-07-06 08:34:56 +080054
55/* Length of the BIOS image */
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020056#define MAX_BIOSLEN (128 * 1024L)
Jason Jinece92f82007-07-06 08:34:56 +080057
Jason Jinece92f82007-07-06 08:34:56 +080058/* Place to save PCI BAR's that we change and later restore */
59static u32 saveROMBaseAddress;
60static u32 saveBaseAddress10;
61static u32 saveBaseAddress14;
62static u32 saveBaseAddress18;
63static u32 saveBaseAddress20;
64
Simon Glass222f25f2014-12-29 19:32:26 -070065/* Addres im memory of VBE region */
66const int vbe_offset = 0x2000;
67
68static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
69 u32 x86_dword_ptr)
Simon Glass4c59f952014-11-14 20:56:40 -070070{
Simon Glass222f25f2014-12-29 19:32:26 -070071 u32 seg_ofs, flat;
72
73 seg_ofs = le32_to_cpu(x86_dword_ptr);
74 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
75 if (flat >= 0xc0000)
76 return vga_info->BIOSImage + flat - 0xc0000;
77 else
78 return buf + (flat - vbe_offset);
79}
80
81static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
82 int vesa_mode, struct vbe_mode_info *mode_info)
83{
84 void *buffer = (void *)(M.mem_base + vbe_offset);
85 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
86 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
87 struct vesa_mode_info *vm;
88 struct vbe_info *info;
89 const u16 *modes_bios, *ptr;
90 u16 *modes;
91 int size;
92
93 debug("VBE: Getting information\n");
94 regs->e.eax = VESA_GET_INFO;
95 regs->e.esi = buffer_seg;
96 regs->e.edi = buffer_adr;
97 info = buffer;
98 memset(info, '\0', sizeof(*info));
99 strcpy(info->signature, "VBE2");
100 BE_int86(0x10, regs, regs);
101 if (regs->e.eax != 0x4f) {
102 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
103 return -ENOSYS;
104 }
105 debug("version %x\n", le16_to_cpu(info->version));
106 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
107 info->oem_string_ptr));
108 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
109 info->vendor_name_ptr));
110 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->product_name_ptr));
112 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->product_rev_ptr));
114 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
115 debug("Modes: ");
116 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
117 debug("%x ", le16_to_cpu(*ptr));
118 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
119 size = (ptr - modes_bios) * sizeof(u16) + 2;
120 modes = malloc(size);
121 if (!modes)
122 return -ENOMEM;
123 memcpy(modes, modes_bios, size);
124
125 regs->e.eax = VESA_GET_CUR_MODE;
126 BE_int86(0x10, regs, regs);
127 if (regs->e.eax != 0x4f) {
128 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
129 return -ENOSYS;
130 }
131 debug("Current mode %x\n", regs->e.ebx);
132
133 for (ptr = modes; *ptr != 0xffff; ptr++) {
134 int mode = le16_to_cpu(*ptr);
135 bool linear_ok;
136 int attr;
137
138 break;
139 debug("Mode %x: ", mode);
140 memset(buffer, '\0', sizeof(struct vbe_mode_info));
141 regs->e.eax = VESA_GET_MODE_INFO;
142 regs->e.ebx = 0;
143 regs->e.ecx = mode;
144 regs->e.edx = 0;
145 regs->e.esi = buffer_seg;
146 regs->e.edi = buffer_adr;
147 BE_int86(0x10, regs, regs);
148 if (regs->e.eax != 0x4f) {
149 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
150 continue;
151 }
152 memcpy(mode_info->mode_info_block, buffer,
153 sizeof(struct vesa_mode_info));
154 mode_info->valid = true;
155 vm = &mode_info->vesa;
156 attr = le16_to_cpu(vm->mode_attributes);
157 linear_ok = attr & 0x80;
158 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
159 le16_to_cpu(vm->x_resolution),
160 le16_to_cpu(vm->y_resolution),
161 vm->bits_per_pixel, vm->memory_model,
162 linear_ok ? "OK" : "not available",
163 attr);
164 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
165 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
166 vm->red_mask_size, vm->green_mask_size,
167 vm->blue_mask_size);
168 }
169
170 return 0;
171}
172
173static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
174 struct vbe_mode_info *mode_info)
175{
176 void *buffer = (void *)(M.mem_base + vbe_offset);
177 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
178 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
179 struct vesa_mode_info *vm;
180
Simon Glass4c59f952014-11-14 20:56:40 -0700181 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700182 regs->e.eax = VESA_SET_MODE;
183 regs->e.ebx = vesa_mode;
Simon Glass222f25f2014-12-29 19:32:26 -0700184 /* request linear framebuffer mode and don't clear display */
185 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glass4c59f952014-11-14 20:56:40 -0700186 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700187 if (regs->e.eax != 0x4f) {
188 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
189 return -ENOSYS;
190 }
Simon Glass4c59f952014-11-14 20:56:40 -0700191
Simon Glass222f25f2014-12-29 19:32:26 -0700192 memset(buffer, '\0', sizeof(struct vbe_mode_info));
193 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700194 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glass4c59f952014-11-14 20:56:40 -0700195 regs->e.ecx = vesa_mode;
Simon Glass4c59f952014-11-14 20:56:40 -0700196 regs->e.esi = buffer_seg;
197 regs->e.edi = buffer_adr;
198 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700199 if (regs->e.eax != 0x4f) {
200 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
201 return -ENOSYS;
202 }
Simon Glass4c59f952014-11-14 20:56:40 -0700203
Simon Glass222f25f2014-12-29 19:32:26 -0700204 memcpy(mode_info->mode_info_block, buffer,
205 sizeof(struct vesa_mode_info));
206 mode_info->valid = true;
207 mode_info->video_mode = vesa_mode;
208 vm = &mode_info->vesa;
209 vm->x_resolution = le16_to_cpu(vm->x_resolution);
210 vm->y_resolution = le16_to_cpu(vm->y_resolution);
211 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
212 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
213 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
214 debug("VBE: Init complete\n");
215
216 return 0;
Simon Glass4c59f952014-11-14 20:56:40 -0700217}
218
Jason Jinece92f82007-07-06 08:34:56 +0800219/****************************************************************************
220PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200221pcidev - PCI device info for the video card on the bus to boot
Simon Glass4c59f952014-11-14 20:56:40 -0700222vga_info - BIOS emulator VGA info structure
Jason Jinece92f82007-07-06 08:34:56 +0800223
224REMARKS:
225This function executes the BIOS POST code on the controller. We assume that
226at this stage the controller has its I/O and memory space enabled and
227that all other controllers are in a disabled state.
228****************************************************************************/
Simon Glass4c59f952014-11-14 20:56:40 -0700229static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
230 int vesa_mode, struct vbe_mode_info *mode_info)
Jason Jinece92f82007-07-06 08:34:56 +0800231{
232 RMREGS regs;
233 RMSREGS sregs;
234
235 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
236 AH must contain the bus and AL must contain the devfn, encoded as
237 (dev << 3) | fn
238 */
239 memset(&regs, 0, sizeof(regs));
240 memset(&sregs, 0, sizeof(sregs));
241 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
242 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
243
244 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glass4c59f952014-11-14 20:56:40 -0700245 BE_setVGA(vga_info);
Jason Jinece92f82007-07-06 08:34:56 +0800246
247 /*Execute the BIOS POST code*/
248 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
249
250 /*Cleanup and exit*/
Simon Glass4c59f952014-11-14 20:56:40 -0700251 BE_getVGA(vga_info);
252
Simon Glass222f25f2014-12-29 19:32:26 -0700253 /* Useful for debugging */
254 if (0)
255 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700256 if (vesa_mode != -1)
257 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800258}
259
260/****************************************************************************
261PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200262pcidev - PCI device info for the video card on the bus
263bar - Place to return the base address register offset to use
Jason Jinece92f82007-07-06 08:34:56 +0800264
265RETURNS:
266The address to use to map the secondary BIOS (AGP devices)
267
268REMARKS:
269Searches all the PCI base address registers for the device looking for a
270memory mapping that is large enough to hold our ROM BIOS. We usually end up
271finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
272to map the BIOS for the device into. We use a mapping that is already
273assigned to the device to ensure the memory range will be passed through
274by any PCI->PCI or AGP->PCI bridge that may be present.
275
276NOTE: Usually this function is only used for AGP devices, but it may be
277 used for PCI devices that have already been POST'ed and the BIOS
278 ROM base address has been zero'ed out.
279
280NOTE: This function leaves the original memory aperture disabled by leaving
281 it programmed to all 1's. It must be restored to the correct value
282 later.
283****************************************************************************/
284static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
285{
286 u32 base, size;
287
288 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
289 pci_read_config_dword(pcidev, *bar, &base);
290 if (!(base & 0x1)) {
291 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
292 pci_read_config_dword(pcidev, *bar, &size);
293 size = ~(size & ~0xFF) + 1;
294 if (size >= MAX_BIOSLEN)
295 return base & ~0xFF;
296 }
297 }
298 return 0;
299}
300
301/****************************************************************************
302REMARKS:
303Some non-x86 Linux kernels map PCI relocateable I/O to values that
304are above 64K, which will not work with the BIOS image that requires
305the offset for the I/O ports to be a maximum of 16-bits. Ideally
306someone should fix the kernel to map the I/O ports for VGA compatible
307devices to a different location (or just all I/O ports since it is
308unlikely you can have enough devices in the machine to use up all
30964K of the I/O space - a total of more than 256 cards would be
310necessary).
311
312Anyway to fix this we change all I/O mapped base registers and
313chop off the top bits.
314****************************************************************************/
315static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
316{
317 if ((*base & 0x1) && (*base > 0xFFFE)) {
318 *base &= 0xFFFF;
319 pci_write_config_dword(pcidev, reg, *base);
320
321 }
322}
323
324/****************************************************************************
325PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200326pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800327
328RETURNS:
329Pointers to the mapped BIOS image
330
331REMARKS:
332Maps a pointer to the BIOS image on the graphics card on the PCI bus.
333****************************************************************************/
334void *PCI_mapBIOSImage(pci_dev_t pcidev)
335{
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500336 u32 BIOSImageBus;
Jason Jinece92f82007-07-06 08:34:56 +0800337 int BIOSImageBAR;
338 u8 *BIOSImage;
339
340 /*Save PCI BAR registers that might get changed*/
341 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
342 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
343 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
344 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
345 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
346
347 /*Fix up I/O base registers to less than 64K */
348 if(saveBaseAddress14 != 0)
349 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
350 else
351 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
352
353 /* Some cards have problems that stop us from being able to read the
354 BIOS image from the ROM BAR. To fix this we have to do some chipset
355 specific programming for different cards to solve this problem.
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200356 */
Jason Jinece92f82007-07-06 08:34:56 +0800357
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500358 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
359 if (BIOSImageBus == 0) {
Jason Jinece92f82007-07-06 08:34:56 +0800360 printf("Find bios addr error\n");
361 return NULL;
362 }
363
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500364 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
365 PCI_REGION_MEM, 0, MAP_NOCACHE);
Jason Jinece92f82007-07-06 08:34:56 +0800366
367 /*Change the PCI BAR registers to map it onto the bus.*/
368 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500369 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Jason Jinece92f82007-07-06 08:34:56 +0800370
371 udelay(1);
372
373 /*Check that the BIOS image is valid. If not fail, or return the
374 compiled in BIOS image if that option was enabled
375 */
376 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
377 return NULL;
378 }
379
380 return BIOSImage;
381}
382
383/****************************************************************************
384PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200385pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800386
387REMARKS:
388Unmaps the BIOS image for the device and restores framebuffer mappings
389****************************************************************************/
390void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
391{
392 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
393 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
394 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
395 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
396 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
397}
398
399/****************************************************************************
400PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200401pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800402VGAInfo - BIOS emulator VGA info structure
403
404RETURNS:
York Sun472d5462013-04-01 11:29:11 -0700405true if successfully initialised, false if not.
Jason Jinece92f82007-07-06 08:34:56 +0800406
407REMARKS:
408Loads and POST's the display controllers BIOS, directly from the BIOS
409image we can extract over the PCI bus.
410****************************************************************************/
Simon Glass4c59f952014-11-14 20:56:40 -0700411static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
412 BE_VGAInfo *vga_info, int vesa_mode,
413 struct vbe_mode_info *mode_info)
Jason Jinece92f82007-07-06 08:34:56 +0800414{
Simon Glass4c59f952014-11-14 20:56:40 -0700415 u32 bios_image_len;
416 uchar *mapped_bios;
417 uchar *copy_of_bios;
Jason Jinece92f82007-07-06 08:34:56 +0800418
Simon Glass4c59f952014-11-14 20:56:40 -0700419 if (bios_rom) {
420 copy_of_bios = bios_rom;
421 bios_image_len = bios_len;
422 } else {
423 /*
424 * Allocate memory to store copy of BIOS from display
425 * controller
426 */
427 mapped_bios = PCI_mapBIOSImage(pcidev);
428 if (mapped_bios == NULL) {
429 printf("videoboot: Video ROM failed to map!\n");
430 return false;
431 }
432
433 bios_image_len = mapped_bios[2] * 512;
434
435 copy_of_bios = malloc(bios_image_len);
436 if (copy_of_bios == NULL) {
437 printf("videoboot: Out of memory!\n");
438 return false;
439 }
440 memcpy(copy_of_bios, mapped_bios, bios_image_len);
441 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jinece92f82007-07-06 08:34:56 +0800442 }
443
Simon Glass4c59f952014-11-14 20:56:40 -0700444 /*Save information in vga_info structure*/
445 vga_info->function = PCI_FUNC(pcidev);
446 vga_info->device = PCI_DEV(pcidev);
447 vga_info->bus = PCI_BUS(pcidev);
448 vga_info->pcidev = pcidev;
449 vga_info->BIOSImage = copy_of_bios;
450 vga_info->BIOSImageLen = bios_image_len;
Jason Jinece92f82007-07-06 08:34:56 +0800451
452 /*Now execute the BIOS POST for the device*/
Simon Glass4c59f952014-11-14 20:56:40 -0700453 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jinece92f82007-07-06 08:34:56 +0800454 printf("videoboot: Video ROM image is invalid!\n");
455 return false;
456 }
457
Simon Glass4c59f952014-11-14 20:56:40 -0700458 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800459
460 /*Reset the size of the BIOS image to the final size*/
Simon Glass4c59f952014-11-14 20:56:40 -0700461 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jinece92f82007-07-06 08:34:56 +0800462 return true;
463}
464
Simon Glass4c59f952014-11-14 20:56:40 -0700465int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
466{
467 BE_VGAInfo *VGAInfo;
468
469 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
470 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
471
472 /*Initialise the x86 BIOS emulator*/
473 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
474 printf("videoboot: Out of memory!\n");
475 return -ENOMEM;
476 }
477 memset(VGAInfo, 0, sizeof(*VGAInfo));
478 BE_init(0, 65536, VGAInfo, 0);
479 *vga_infop = VGAInfo;
480
481 return 0;
482}
483
484void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
485{
486 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
487}
488
489int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
490 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
491 struct vbe_mode_info *mode_info)
492{
493 /*Post all the display controller BIOS'es*/
494 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
495 vesa_mode, mode_info))
496 return -EINVAL;
497
498 /*
499 * Cleanup and exit the emulator if requested. If the BIOS emulator
500 * is needed after booting the card, we will not call BE_exit and
501 * leave it enabled for further use (ie: VESA driver etc).
502 */
503 if (clean_up) {
504 BE_exit();
Bin Meng6e7b5f22015-04-24 15:48:05 +0800505 if (vga_info->BIOSImage &&
506 (u32)(vga_info->BIOSImage) != 0xc0000)
Simon Glass4c59f952014-11-14 20:56:40 -0700507 free(vga_info->BIOSImage);
508 free(vga_info);
509 vga_info = NULL;
510 }
511
512 return 0;
513}
514
Jason Jinece92f82007-07-06 08:34:56 +0800515/****************************************************************************
516PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200517pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800518pVGAInfo - Place to return VGA info structure is requested
York Sun472d5462013-04-01 11:29:11 -0700519cleanUp - true to clean up on exit, false to leave emulator active
Jason Jinece92f82007-07-06 08:34:56 +0800520
521REMARKS:
522Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
523and the X86 BIOS emulator module.
524****************************************************************************/
Simon Glass4c59f952014-11-14 20:56:40 -0700525int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
Jason Jinece92f82007-07-06 08:34:56 +0800526{
527 BE_VGAInfo *VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700528 int ret;
Jason Jinece92f82007-07-06 08:34:56 +0800529
Simon Glass4c59f952014-11-14 20:56:40 -0700530 ret = biosemu_setup(pcidev, &VGAInfo);
531 if (ret)
Jason Jinece92f82007-07-06 08:34:56 +0800532 return false;
Simon Glass4c59f952014-11-14 20:56:40 -0700533 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
534 if (ret)
Ed Swarthout9624f6d2010-03-31 09:54:28 -0500535 return false;
Jason Jinece92f82007-07-06 08:34:56 +0800536
Simon Glass4c59f952014-11-14 20:56:40 -0700537 /* Return VGA info pointer if the caller requested it*/
Jason Jinece92f82007-07-06 08:34:56 +0800538 if (pVGAInfo)
539 *pVGAInfo = VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700540
Jason Jinece92f82007-07-06 08:34:56 +0800541 return true;
542}