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TsiChung Liewbf9a5212009-06-12 11:29:00 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wang32dbaaf2012-03-26 21:49:04 +00005 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
TsiChung Liewbf9a5212009-06-12 11:29:00 +00006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
TsiChung Liewbf9a5212009-06-12 11:29:00 +00009 */
10
11#include <config.h>
12#include <common.h>
13#include <asm/immap.h>
Alison Wang32dbaaf2012-03-26 21:49:04 +000014#include <asm/io.h>
TsiChung Liewbf9a5212009-06-12 11:29:00 +000015
16DECLARE_GLOBAL_DATA_PTR;
17
18int checkboard(void)
19{
20 puts("Board: ");
21 puts("Freescale M5208EVBe\n");
22 return 0;
23};
24
Simon Glassf1683aa2017-04-06 12:47:05 -060025int dram_init(void)
TsiChung Liewbf9a5212009-06-12 11:29:00 +000026{
Alison Wang32dbaaf2012-03-26 21:49:04 +000027 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000028 u32 dramsize, i;
29
30 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
31
32 for (i = 0x13; i < 0x20; i++) {
33 if (dramsize == (1 << i))
34 break;
35 }
36 i--;
37
Alison Wang32dbaaf2012-03-26 21:49:04 +000038 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000039#ifdef CONFIG_SYS_SDRAM_BASE1
Alison Wang32dbaaf2012-03-26 21:49:04 +000040 out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000041#endif
Alison Wang32dbaaf2012-03-26 21:49:04 +000042 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
43 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000044
45 udelay(500);
46
47 /* Issue PALL */
Alison Wang32dbaaf2012-03-26 21:49:04 +000048 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000049 asm("nop");
50
51 /* Perform two refresh cycles */
Alison Wang32dbaaf2012-03-26 21:49:04 +000052 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
53 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000054 asm("nop");
55
56 /* Issue LEMR */
Alison Wang32dbaaf2012-03-26 21:49:04 +000057 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000058 asm("nop");
Alison Wang32dbaaf2012-03-26 21:49:04 +000059 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000060 asm("nop");
61
Alison Wang32dbaaf2012-03-26 21:49:04 +000062 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000063 asm("nop");
64
Alison Wang32dbaaf2012-03-26 21:49:04 +000065 out_be32(&sdram->ctrl,
66 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
TsiChung Liewbf9a5212009-06-12 11:29:00 +000067 asm("nop");
68
69 udelay(100);
70
Simon Glass088454c2017-03-31 08:40:25 -060071 gd->ram_size = dramsize;
72
73 return 0;
TsiChung Liewbf9a5212009-06-12 11:29:00 +000074};
75
76int testdram(void)
77{
78 /* TODO: XXX XXX XXX */
79 printf("DRAM test not implemented!\n");
80
81 return (0);
82}