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wdenkda27dcf2002-09-10 19:19:06 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Rolf Offermanns <rof@sysgo.de>
5 *
6 * Configuation settings for the SSV DNP1110 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
31 * If we are developing, we might want to start armboot from ram
32 * so we MUST NOT initialize critical regs like mem-timing ...
33 */
wdenk8aa1a2d2005-04-04 12:44:11 +000034#define CONFIG_SKIP_LOWLEVEL_INIT 1
35#undef CONFIG_SKIP_RELOCATE_UBOOT
wdenkda27dcf2002-09-10 19:19:06 +000036
37/*
38 * High Level Configuration Options
39 * (easy to change)
40 */
41#define CONFIG_SA1110 1 /* This is an SA1110 CPU */
42#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
43
44#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45
46/*
47 * Size of malloc() pool
48 */
wdenk699b13a2002-11-03 18:03:52 +000049#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenka8c7c702003-12-06 19:49:23 +000050#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkda27dcf2002-09-10 19:19:06 +000051
52/*
53 * Hardware drivers
54 */
55#define CONFIG_DRIVER_SMC91111
56#define CONFIG_SMC91111_BASE 0x20000300
57
58
59/*
60 * select serial console configuration
61 */
62#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
63
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66
67#define CONFIG_BAUDRATE 115200
68
69#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
70
71/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
72#include <cmd_confdefs.h>
73
74#define CONFIG_BOOTDELAY 3
75#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
76#define CONFIG_ETHADDR 02:80:ad:20:31:b8
77#define CONFIG_NETMASK 255.255.0.0
78#define CONFIG_IPADDR 172.22.2.23
79#define CONFIG_SERVERIP 172.22.2.22
wdenkdc7c9a12003-03-26 06:55:25 +000080#define CONFIG_BOOTFILE "dnp1110"
wdenkda27dcf2002-09-10 19:19:06 +000081#define CONFIG_BOOTCOMMAND "tftp; bootm"
82
83#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
84#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
85#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
86#endif
87
88/*
89 * Miscellaneous configurable options
90 */
91#define CFG_LONGHELP /* undef to save memory */
92#define CFG_PROMPT "DNP1110 # " /* Monitor Command Prompt */
93#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
94#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
95#define CFG_MAXARGS 16 /* max number of command args */
96#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
97
98#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
99#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
100
101#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
102
103#define CFG_LOAD_ADDR 0xc0200000 /* default load address */
104
105#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
106#define CFG_CPUSPEED 0x0b /* set core clock to 220 MHz */
107
108 /* valid baudrates */
109#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
110
111/*-----------------------------------------------------------------------
112 * Stack sizes
113 *
114 * The stack sizes are set up in start.S using the settings below
115 */
116#define CONFIG_STACKSIZE (128*1024) /* regular stack */
117#ifdef CONFIG_USE_IRQ
118#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
119#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
120#endif
121
122/*-----------------------------------------------------------------------
123 * Physical Memory Map
124 */
125#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
126#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
127#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
128
129
130#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
131#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
wdenkdc7c9a12003-03-26 06:55:25 +0000132#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 32 MB Banks */
133#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
wdenkda27dcf2002-09-10 19:19:06 +0000134
135#define CFG_FLASH_BASE PHYS_FLASH_1
136
137/*-----------------------------------------------------------------------
138 * FLASH and environment organization
139 */
wdenkdc7c9a12003-03-26 06:55:25 +0000140#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
141#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkda27dcf2002-09-10 19:19:06 +0000142
143/* timeout values are in ticks */
144#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
145#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
146
147#define CFG_ENV_IS_IN_FLASH 1
wdenkdc7c9a12003-03-26 06:55:25 +0000148#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xF80000) /* Addr of Environment Sector */
149#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
wdenkda27dcf2002-09-10 19:19:06 +0000150
151#endif /* __CONFIG_H */