Blame - include/configs/malta.h - platform/external/u-boot

blob: fc4baba7d7ed212aa6aff756e2d39d4c53cac3e6 [file] [log] [blame]

Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	1	/*
				2	* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
				3	*
Tom Rini	0b17998	2013-07-24 09:34:30 -0400	[diff] [blame]	4	* SPDX-License-Identifier: GPL-2.0
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	5	*/
				6
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	7	#ifndef _MALTA_CONFIG_H
				8	#define _MALTA_CONFIG_H
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	9
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	10	/*
				11	* System configuration
				12	*/
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	13	#define CONFIG_MALTA
Paul Burton	5f978d7	2014-04-07 10:11:23 +0100	[diff] [blame]	14	#define CONFIG_BOARD_EARLY_INIT_F
				15	#define CONFIG_DISPLAY_BOARDINFO
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	16
Gabor Juhos	ab41305	2013-10-24 14:32:00 +0200	[diff] [blame]	17	#define CONFIG_MEMSIZE_IN_BYTES
				18
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	19	#define CONFIG_PCI
				20	#define CONFIG_PCI_GT64120
Paul Burton	baf37f0	2013-11-08 11:18:50 +0000	[diff] [blame]	21	#define CONFIG_PCI_MSC01
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	22	#define CONFIG_PCI_PNP
Gabor Juhos	f195749	2013-05-22 03:57:44 +0000	[diff] [blame]	23	#define CONFIG_PCNET
Paul Burton	e0878af	2013-11-08 11:18:52 +0000	[diff] [blame]	24	#define CONFIG_PCNET_79C973
				25	#define PCNET_HAS_PROM
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	26
Paul Burton	3ced12a	2013-11-08 11:18:55 +0000	[diff] [blame]	27	#define CONFIG_MISC_INIT_R
				28	#define CONFIG_RTC_MC146818
				29	#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
				30
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	31	/*
				32	* CPU Configuration
				33	*/
				34	#define CONFIG_SYS_MHZ 250 /* arbitrary value */
				35	#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	36
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	37	/*
				38	* Memory map
				39	*/
Gabor Juhos	10473d0	2013-11-12 16:47:32 +0100	[diff] [blame]	40	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	41
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	42	#ifdef CONFIG_64BIT
				43	# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
				44	#else
				45	# define CONFIG_SYS_SDRAM_BASE 0x80000000
				46	#endif
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	47	#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
				48
				49	#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
				50
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	51	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
				52	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
				53	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	54
				55	#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
				56	#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton	67d4752	2013-11-26 17:45:28 +0000	[diff] [blame]	57	#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	58
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	59	#define CONFIG_SYS_CBSIZE 256
				60	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
				61	sizeof(CONFIG_SYS_PROMPT) + 16)
				62	#define CONFIG_SYS_MAXARGS 16
				63
				64	#define CONFIG_AUTO_COMPLETE
				65	#define CONFIG_CMDLINE_EDITING
				66
				67	/*
				68	* Serial driver
				69	*/
				70	#define CONFIG_BAUDRATE 115200
Paul Burton	2e7eb12	2016-05-17 07:43:27 +0100	[diff] [blame]	71	#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	72
				73	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	74	* Flash configuration
				75	*/
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	76	#ifdef CONFIG_64BIT
				77	# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
				78	#else
				79	# define CONFIG_SYS_FLASH_BASE 0xbe000000
				80	#endif
Gabor Juhos	52caee0	2013-05-22 03:57:39 +0000	[diff] [blame]	81	#define CONFIG_SYS_MAX_FLASH_BANKS 1
				82	#define CONFIG_SYS_MAX_FLASH_SECT 128
				83	#define CONFIG_SYS_FLASH_CFI
				84	#define CONFIG_FLASH_CFI_DRIVER
				85	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	86
				87	/*
Paul Burton	fba6f45	2013-11-08 11:18:56 +0000	[diff] [blame]	88	* Environment
				89	*/
				90	#define CONFIG_ENV_IS_IN_FLASH
				91	#define CONFIG_ENV_SECT_SIZE 0x20000
				92	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
				93	#define CONFIG_ENV_ADDR \
				94	(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
				95
				96	/*
Paul Burton	ba21a45	2015-01-29 10:38:20 +0000	[diff] [blame]	97	* IDE/ATA
				98	*/
				99	#define CONFIG_SYS_IDE_MAXBUS 1
				100	#define CONFIG_SYS_IDE_MAXDEVICE 2
				101	#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
				102	#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
				103	#define CONFIG_SYS_ATA_DATA_OFFSET 0
				104	#define CONFIG_SYS_ATA_REG_OFFSET 0
				105
				106	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	107	* Commands
				108	*/
Paul Burton	3ced12a	2013-11-08 11:18:55 +0000	[diff] [blame]	109	#define CONFIG_CMD_DATE
Paul Burton	ba21a45	2015-01-29 10:38:20 +0000	[diff] [blame]	110	#define CONFIG_CMD_IDE
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	111	#define CONFIG_CMD_PCI
				112
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	113	#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
				114
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	115	#endif /* _MALTA_CONFIG_H */