blob: 71cdf8805485cc39320fc0985aab5e65951633f8 [file] [log] [blame]
Fabio Estevama643acd2015-07-21 19:48:40 -03001/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 * Fabio Estevam <fabio.estevam@freescale.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __MAX77696_PMIC_H__
9#define __MAX77696_PMIC_H__
10
11#define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C
12
13enum {
14 L01_CNFG1 = 0x43,
15 L01_CNFG2,
16 L02_CNFG1,
17 L02_CNFG2,
18 L03_CNFG1,
19 L03_CNFG2,
20 L04_CNFG1,
21 L04_CNFG2,
22 L05_CNFG1,
23 L05_CNFG2,
24 L06_CNFG1,
25 L06_CNFG2,
26 L07_CNFG1,
27 L07_CNFG2,
28 L08_CNFG1,
29 L08_CNFG2,
30 L09_CNFG1,
31 L09_CNFG2,
32 L10_CNFG1,
33 L10_CNFG2,
34 LDO_INT1,
35 LDO_INT2,
36 LDO_INT1M,
37 LDO_INT2M,
38 LDO_CNFG3,
39 SW1_CNTRL,
40 SW2_CNTRL,
41 SW3_CNTRL,
42 SW4_CNTRL,
43 EPDCNFG,
44 EPDINTS,
45 EPDINT,
46 EPDINTM,
47 EPDVCOM,
48 EPDVEE,
49 EPDVNEG,
50 EPDVPOS,
51 EPDVDDH,
52 EPDSEQ,
53 EPDOKINTS,
54 CID = 0x9c,
55 PMIC_NUM_OF_REGS,
56};
57
58int power_max77696_init(unsigned char bus);
59
60#endif