Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefan Roese | aea02ab | 2016-02-12 14:24:07 +0100 | [diff] [blame] | 2 | /* |
3 | * Copyright (C) 2016 Stefan Roese <sr@denx.de> | ||||
Stefan Roese | aea02ab | 2016-02-12 14:24:07 +0100 | [diff] [blame] | 4 | */ |
5 | |||||
6 | /* Base addresses for the SPI direct access mode */ | ||||
7 | #define SPI_BUS0_DEV1_BASE 0xe0000000 | ||||
8 | #define SPI_BUS0_DEV1_SIZE (1 << 20) | ||||
9 | #define SPI_BUS1_DEV2_BASE (SPI_BUS0_DEV1_BASE + SPI_BUS0_DEV1_SIZE) | ||||
10 | |||||
11 | void board_fpga_add(void); |