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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefan Roeseb0f80b92015-01-19 11:33:42 +01002/*
Stefan Roesea5f88872016-01-07 14:09:09 +01003 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
Stefan Roeseb0f80b92015-01-19 11:33:42 +01004 */
5
6#include <common.h>
Stefan Roese64512232015-11-25 07:37:00 +01007#include <dm.h>
8#include <debug_uart.h>
9#include <fdtdec.h>
Simon Glassdb41d652019-12-28 10:45:07 -070010#include <hang.h>
Simon Glass691d7192020-05-10 11:40:02 -060011#include <init.h>
Stefan Roeseb0f80b92015-01-19 11:33:42 +010012#include <spl.h>
13#include <asm/io.h>
14#include <asm/arch/cpu.h>
15#include <asm/arch/soc.h>
16
Stefan Roesea5f88872016-01-07 14:09:09 +010017static u32 get_boot_device(void)
18{
19 u32 val;
20 u32 boot_device;
21
Stefan Roesef4db6c92016-01-07 14:12:04 +010022 /*
23 * First check, if UART boot-mode is active. This can only
24 * be done, via the bootrom error register. Here the
25 * MSB marks if the UART mode is active.
26 */
27 val = readl(CONFIG_BOOTROM_ERR_REG);
28 boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
29 debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
30 if (boot_device == BOOTROM_ERR_MODE_UART)
31 return BOOT_DEVICE_UART;
32
Chris Packham2fd42842018-08-17 20:47:42 +120033#ifdef CONFIG_ARMADA_38X
34 /*
35 * If the bootrom error code contains any other than zeros it's an
36 * error condition and the bootROM has fallen back to UART boot
37 */
38 boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
39 if (boot_device)
40 return BOOT_DEVICE_UART;
41#endif
42
Stefan Roesef4db6c92016-01-07 14:12:04 +010043 /*
44 * Now check the SAR register for the strapped boot-device
45 */
Stefan Roesea5f88872016-01-07 14:09:09 +010046 val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
47 boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
Stefan Roesef4db6c92016-01-07 14:12:04 +010048 debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
Stefan Roesea5f88872016-01-07 14:09:09 +010049 switch (boot_device) {
Sean Nyekjaer926c8b22017-11-24 14:01:47 +010050#if defined(CONFIG_ARMADA_38X)
51 case BOOT_FROM_NAND:
52 return BOOT_DEVICE_NAND;
53#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010054#ifdef CONFIG_SPL_MMC_SUPPORT
55 case BOOT_FROM_MMC:
56 case BOOT_FROM_MMC_ALT:
57 return BOOT_DEVICE_MMC1;
58#endif
59 case BOOT_FROM_UART:
Baruch Siachf3a88e22017-09-24 15:50:17 +030060#ifdef BOOT_FROM_UART_ALT
61 case BOOT_FROM_UART_ALT:
62#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010063 return BOOT_DEVICE_UART;
Baruch Siach22c65452019-05-16 13:03:58 +030064#ifdef BOOT_FROM_SATA
65 case BOOT_FROM_SATA:
66 case BOOT_FROM_SATA_ALT:
67 return BOOT_DEVICE_SATA;
68#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010069 case BOOT_FROM_SPI:
70 default:
71 return BOOT_DEVICE_SPI;
72 };
73}
74
Stefan Roeseb0f80b92015-01-19 11:33:42 +010075u32 spl_boot_device(void)
76{
Stefan Roesea5f88872016-01-07 14:09:09 +010077 return get_boot_device();
Stefan Roeseb0f80b92015-01-19 11:33:42 +010078}
79
80void board_init_f(ulong dummy)
81{
Stefan Roese64512232015-11-25 07:37:00 +010082 int ret;
83
Stefan Roesee3cccf92015-04-17 18:13:06 +020084 /*
85 * Pin muxing needs to be done before UART output, since
86 * on A38x the UART pins need some re-muxing for output
87 * to work.
88 */
89 board_early_init_f();
90
Stefan Roese64512232015-11-25 07:37:00 +010091 /* Example code showing how to enable the debug UART on MVEBU */
92#ifdef EARLY_UART
93 /*
94 * Debug UART can be used from here if required:
95 *
96 * debug_uart_init();
97 * printch('a');
98 * printhex8(0x1234);
99 * printascii("string");
100 */
101#endif
102
Stefan Roesef2100f62019-04-12 16:42:28 +0200103 /*
104 * Use special translation offset for SPL. This needs to be
105 * configured *before* spl_init() is called as this function
106 * calls dm_init() which calls the bind functions of the
107 * device drivers. Here the base address needs to be configured
108 * (translated) correctly.
109 */
110 gd->translation_offset = 0xd0000000 - 0xf1000000;
111
Stefan Roese64512232015-11-25 07:37:00 +0100112 ret = spl_init();
113 if (ret) {
114 debug("spl_init() failed: %d\n", ret);
115 hang();
116 }
117
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100118 preloader_console_init();
119
Stefan Roeseade741b2015-07-15 15:36:52 +0200120 timer_init();
121
Stefan Roese09e89ab2016-02-10 07:23:00 +0100122 /* Armada 375 does not support SerDes and DDR3 init yet */
123#if !defined(CONFIG_ARMADA_375)
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100124 /* First init the serdes PHY's */
125 serdes_phy_config();
126
127 /* Setup DDR */
128 ddr3_init();
Stefan Roese09e89ab2016-02-10 07:23:00 +0100129#endif
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100130
Baruch Siachcc66ebd2019-07-10 18:23:04 +0300131 /* Initialize Auto Voltage Scaling */
132 mv_avs_init();
133
Chris Packhamad91fdf2020-02-26 19:53:50 +1300134 /* Update read timing control for PCIe */
135 mv_rtc_config();
136
Stefan Roese944c7a32015-08-25 13:49:41 +0200137 /*
138 * Return to the BootROM to continue the Marvell xmodem
139 * UART boot protocol. As initiated by the kwboot tool.
140 *
141 * This can only be done by the BootROM and not by the
142 * U-Boot SPL infrastructure, since the beginning of the
143 * image is already read and interpreted by the BootROM.
144 * SPL has no chance to receive this information. So we
145 * need to return to the BootROM to enable this xmodem
146 * UART download.
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100147 *
148 * If booting from NAND lets let the BootROM load the
149 * rest of the bootloader.
Stefan Roese944c7a32015-08-25 13:49:41 +0200150 */
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100151 switch (get_boot_device()) {
152 case BOOT_DEVICE_UART:
153#if defined(CONFIG_ARMADA_38X)
154 case BOOT_DEVICE_NAND:
155#endif
156 return_to_bootrom();
157 }
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100158}