blob: 571492274f4a68b677a2616d6a49af877ea358f4 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020010#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060011#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010019#include <led.h>
Simon Glass336d4612020-02-03 07:36:16 -070020#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010021#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020022#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060023#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020024#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020025#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020026#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020027#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010028#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010029#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020030#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020031#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010032#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010033#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020034#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020035#include <jffs2/load_kernel.h>
Simon Glass61b29b82020-02-03 07:36:15 -070036#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020037#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020038#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010039#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010040
Patrick Delaunay45459742019-02-27 17:01:24 +010041/* SYSCFG registers */
42#define SYSCFG_BOOTR 0x00
43#define SYSCFG_PMCSETR 0x04
44#define SYSCFG_IOCTRLSETR 0x18
45#define SYSCFG_ICNR 0x1C
46#define SYSCFG_CMPCR 0x20
47#define SYSCFG_CMPENSETR 0x24
48#define SYSCFG_PMCCLRR 0x44
49
50#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
51#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
52
53#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
54#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
55#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
56#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
57#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
58
59#define SYSCFG_CMPCR_SW_CTRL BIT(1)
60#define SYSCFG_CMPCR_READY BIT(8)
61
62#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
63
64#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
65#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
66
67#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
68
69#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020070#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
71#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
72#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010073
Patrick Delaunayf8598d92018-03-12 10:46:18 +010074/*
75 * Get a global data pointer
76 */
77DECLARE_GLOBAL_DATA_PTR;
78
Patrice Chotard28c064e2019-04-30 18:09:38 +020079#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010080#define USB_WARNING_LOW_THRESHOLD_UV 660000
81#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020082#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010083
Patrick Delaunayd461f102019-02-12 11:44:41 +010084int checkboard(void)
85{
86 int ret;
87 char *mode;
88 u32 otp;
89 struct udevice *dev;
90 const char *fdt_compat;
91 int fdt_compat_len;
92
Patrick Delaunay43df0a12020-03-18 09:22:49 +010093 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +010094 mode = "trusted";
95 else
96 mode = "basic";
97
98 printf("Board: stm32mp1 in %s mode", mode);
99 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
100 &fdt_compat_len);
101 if (fdt_compat && fdt_compat_len)
102 printf(" (%s)", fdt_compat);
103 puts("\n");
104
Patrick Delaunay888dc682020-03-24 09:05:00 +0100105 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100106 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
107 ret = uclass_get_device_by_driver(UCLASS_MISC,
108 DM_GET_DRIVER(stm32mp_bsec),
109 &dev);
110 if (!ret)
111 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
112 &otp, sizeof(otp));
113 if (ret > 0 && otp)
114 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
115 otp >> 16,
116 (otp >> 12) & 0xF,
117 (otp >> 4) & 0xF,
118 ((otp >> 8) & 0xF) - 1 + 'A',
119 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100120 }
121
122 return 0;
123}
124
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100125static void board_key_check(void)
126{
127#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
128 ofnode node;
129 struct gpio_desc gpio;
130 enum forced_boot_mode boot_mode = BOOT_NORMAL;
131
132 node = ofnode_path("/config");
133 if (!ofnode_valid(node)) {
134 debug("%s: no /config node?\n", __func__);
135 return;
136 }
137#ifdef CONFIG_FASTBOOT
138 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
139 &gpio, GPIOD_IS_IN)) {
140 debug("%s: could not find a /config/st,fastboot-gpios\n",
141 __func__);
142 } else {
143 if (dm_gpio_get_value(&gpio)) {
144 puts("Fastboot key pressed, ");
145 boot_mode = BOOT_FASTBOOT;
146 }
147
148 dm_gpio_free(NULL, &gpio);
149 }
150#endif
151#ifdef CONFIG_CMD_STM32PROG
152 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
153 &gpio, GPIOD_IS_IN)) {
154 debug("%s: could not find a /config/st,stm32prog-gpios\n",
155 __func__);
156 } else {
157 if (dm_gpio_get_value(&gpio)) {
158 puts("STM32Programmer key pressed, ");
159 boot_mode = BOOT_STM32PROG;
160 }
161 dm_gpio_free(NULL, &gpio);
162 }
163#endif
164
165 if (boot_mode != BOOT_NORMAL) {
166 puts("entering download mode...\n");
167 clrsetbits_le32(TAMP_BOOT_CONTEXT,
168 TAMP_BOOT_FORCED_MASK,
169 boot_mode);
170 }
171#endif
172}
173
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100174#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200175
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100176/* STMicroelectronics STUSB1600 Type-C controller */
177#define STUSB1600_CC_CONNECTION_STATUS 0x0E
178
179/* STUSB1600_CC_CONNECTION_STATUS bitfields */
180#define STUSB1600_CC_ATTACH BIT(0)
181
182static int stusb1600_init(struct udevice **dev_stusb1600)
183{
184 ofnode node;
185 struct udevice *dev, *bus;
186 int ret;
187 u32 chip_addr;
188
189 *dev_stusb1600 = NULL;
190
191 /* if node stusb1600 is present, means DK1 or DK2 board */
192 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
193 if (!ofnode_valid(node))
194 return -ENODEV;
195
196 ret = ofnode_read_u32(node, "reg", &chip_addr);
197 if (ret)
198 return -EINVAL;
199
200 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
201 &bus);
202 if (ret) {
203 printf("bus for stusb1600 not found\n");
204 return -ENODEV;
205 }
206
207 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
208 if (!ret)
209 *dev_stusb1600 = dev;
210
211 return ret;
212}
213
214static int stusb1600_cable_connected(struct udevice *dev)
215{
216 u8 status;
217
218 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
219 return 0;
220
221 return status & STUSB1600_CC_ATTACH;
222}
223
224#include <usb/dwc2_udc.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100225int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200226{
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100227 struct udevice *stusb1600;
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100228 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200229 int ret;
230
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100231 if (!stusb1600_init(&stusb1600))
232 return stusb1600_cable_connected(stusb1600);
233
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100234 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
235 DM_GET_DRIVER(dwc2_udc_otg),
236 &dwc2_udc_otg);
237 if (!ret)
238 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200239
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100240 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200241}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200242
243#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
244#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
245
246int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
247{
248 if (!strcmp(name, "usb_dnl_dfu"))
249 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
250 else if (!strcmp(name, "usb_dnl_fastboot"))
251 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
252 &dev->idProduct);
253 else
254 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
255
256 return 0;
257}
258
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100259#endif /* CONFIG_USB_GADGET */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200260
Patrice Chotard395f1292019-02-12 16:50:40 +0100261static int get_led(struct udevice **dev, char *led_string)
262{
263 char *led_name;
264 int ret;
265
266 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
267 if (!led_name) {
268 pr_debug("%s: could not find %s config string\n",
269 __func__, led_string);
270 return -ENOENT;
271 }
272 ret = led_get_by_label(led_name, dev);
273 if (ret) {
274 debug("%s: get=%d\n", __func__, ret);
275 return ret;
276 }
277
278 return 0;
279}
280
281static int setup_led(enum led_state_t cmd)
282{
283 struct udevice *dev;
284 int ret;
285
Patrick Delaunay0c952952020-04-22 14:29:12 +0200286 if (!CONFIG_IS_ENABLED(LED))
287 return 0;
288
Patrice Chotard395f1292019-02-12 16:50:40 +0100289 ret = get_led(&dev, "u-boot,boot-led");
290 if (ret)
291 return ret;
292
293 ret = led_set_state(dev, cmd);
294 return ret;
295}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200296
297static void __maybe_unused led_error_blink(u32 nb_blink)
298{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200299 int ret;
300 struct udevice *led;
301 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200302
303 if (!nb_blink)
304 return;
305
Patrick Delaunay0c952952020-04-22 14:29:12 +0200306 if (CONFIG_IS_ENABLED(LED)) {
307 ret = get_led(&led, "u-boot,error-led");
308 if (!ret) {
309 /* make u-boot,error-led blinking */
310 /* if U32_MAX and 125ms interval, for 17.02 years */
311 for (i = 0; i < 2 * nb_blink; i++) {
312 led_set_state(led, LEDST_TOGGLE);
313 mdelay(125);
314 WATCHDOG_RESET();
315 }
316 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200317 }
318 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200319
320 /* infinite: the boot process must be stopped */
321 if (nb_blink == U32_MAX)
322 hang();
323}
Patrice Chotard395f1292019-02-12 16:50:40 +0100324
Patrick Delaunay41542472019-07-30 19:16:43 +0200325#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100326static int board_check_usb_power(void)
327{
328 struct ofnode_phandle_args adc_args;
329 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100330 ofnode node;
331 unsigned int raw;
332 int max_uV = 0;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200333 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100334 int ret, uV, adc_count;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200335 u32 nb_blink;
336 u8 i;
Patrice Chotard395f1292019-02-12 16:50:40 +0100337 node = ofnode_path("/config");
338 if (!ofnode_valid(node)) {
339 debug("%s: no /config node?\n", __func__);
340 return -ENOENT;
341 }
342
343 /*
344 * Retrieve the ADC channels devices and get measurement
345 * for each of them
346 */
347 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
348 "#io-channel-cells");
349 if (adc_count < 0) {
350 if (adc_count == -ENOENT)
351 return 0;
352
353 pr_err("%s: can't find adc channel (%d)\n", __func__,
354 adc_count);
355
356 return adc_count;
357 }
358
359 for (i = 0; i < adc_count; i++) {
360 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
361 "#io-channel-cells", 0, i,
362 &adc_args)) {
363 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
364 __func__);
365 return 0;
366 }
367
368 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
369 &adc);
370
371 if (ret) {
372 pr_err("%s: Can't get adc device(%d)\n", __func__,
373 ret);
374 return ret;
375 }
376
377 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
378 &raw);
379 if (ret) {
380 pr_err("%s: single shot failed for %s[%d]!\n",
381 __func__, adc->name, adc_args.args[0]);
382 return ret;
383 }
384 /* Convert to uV */
385 if (!adc_raw_to_uV(adc, raw, &uV)) {
386 if (uV > max_uV)
387 max_uV = uV;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200388 if (uV < min_uV)
389 min_uV = uV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100390 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
391 adc->name, adc_args.args[0], raw, uV);
392 } else {
393 pr_err("%s: Can't get uV value for %s[%d]\n",
394 __func__, adc->name, adc_args.args[0]);
395 }
396 }
397
398 /*
399 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
400 * board is plugged on an USB-C 3A power supply and boot process can
401 * continue.
402 */
403 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotard28c064e2019-04-30 18:09:38 +0200404 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
405 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100406 return 0;
407
Patrice Chotard28c064e2019-04-30 18:09:38 +0200408 pr_err("****************************************************\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100409
Patrice Chotard28c064e2019-04-30 18:09:38 +0200410 /*
411 * If highest and lowest value are either both below
412 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
413 * means USB TYPE-C is in unattached mode, this is an issue, make
414 * u-boot,error-led blinking and stop boot process.
415 */
416 if ((max_uV > USB_LOW_THRESHOLD_UV &&
417 min_uV > USB_LOW_THRESHOLD_UV) ||
418 (max_uV <= USB_LOW_THRESHOLD_UV &&
419 min_uV <= USB_LOW_THRESHOLD_UV)) {
420 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
421 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
422 /* with 125ms interval, led will blink for 17.02 years ....*/
423 nb_blink = U32_MAX;
424 }
425
426 if (max_uV > USB_LOW_THRESHOLD_UV &&
427 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
428 min_uV <= USB_LOW_THRESHOLD_UV) {
429 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100430 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200431 }
432
433 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
434 max_uV <= USB_START_LOW_THRESHOLD_UV &&
435 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard5eff1682020-04-30 18:41:05 +0200436 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100437 nb_blink = 3;
438 }
439
Patrice Chotard28c064e2019-04-30 18:09:38 +0200440 /*
441 * If highest value is above 2.15 Volts that means that the USB TypeC
442 * supplies more than 3 Amp, this is not compliant with TypeC specification
443 */
444 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
445 pr_err("* USB TYPE-C charger not compliant with *\n");
446 pr_err("* specification *\n");
447 pr_err("****************************************************\n\n");
448 /* with 125ms interval, led will blink for 17.02 years ....*/
449 nb_blink = U32_MAX;
450 } else {
451 pr_err("* Current too low, use a 3A power supply! *\n");
452 pr_err("****************************************************\n\n");
453 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100454
Patrick Delaunaydd281082019-07-30 19:16:39 +0200455 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100456
457 return 0;
458}
Patrick Delaunay41542472019-07-30 19:16:43 +0200459#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100460
Patrick Delaunay45459742019-02-27 17:01:24 +0100461static void sysconf_init(void)
462{
Patrick Delaunay654706b2020-04-01 09:07:33 +0200463#ifndef CONFIG_TFABOOT
Patrick Delaunay45459742019-02-27 17:01:24 +0100464 u8 *syscfg;
465#ifdef CONFIG_DM_REGULATOR
466 struct udevice *pwr_dev;
467 struct udevice *pwr_reg;
468 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100469 u32 otp = 0;
470#endif
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200471 int ret;
472 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100473
474 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
475
476 /* interconnect update : select master using the port 1 */
477 /* LTDC = AXI_M9 */
478 /* GPU = AXI_M8 */
479 /* today information is hardcoded in U-Boot */
480 writel(BIT(9), syscfg + SYSCFG_ICNR);
481
482 /* disable Pull-Down for boot pin connected to VDD */
483 bootr = readl(syscfg + SYSCFG_BOOTR);
484 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
485 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
486 writel(bootr, syscfg + SYSCFG_BOOTR);
487
488#ifdef CONFIG_DM_REGULATOR
489 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
490 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
491 * The customer will have to disable this for low frequencies
492 * or if AFMUX is selected but the function not used, typically for
493 * TRACE. Otherwise, impact on power consumption.
494 *
495 * WARNING:
496 * enabling High Speed mode while VDD>2.7V
497 * with the OTP product_below_2v5 (OTP 18, BIT 13)
498 * erroneously set to 1 can damage the IC!
499 * => U-Boot set the register only if VDD < 2.7V (in DT)
500 * but this value need to be consistent with board design
501 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200502 ret = uclass_get_device_by_driver(UCLASS_PMIC,
503 DM_GET_DRIVER(stm32mp_pwr_pmic),
504 &pwr_dev);
Patrick Delaunay45459742019-02-27 17:01:24 +0100505 if (!ret) {
506 ret = uclass_get_device_by_driver(UCLASS_MISC,
507 DM_GET_DRIVER(stm32mp_bsec),
508 &dev);
509 if (ret) {
510 pr_err("Can't find stm32mp_bsec driver\n");
511 return;
512 }
513
514 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200515 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100516 otp = otp & BIT(13);
517
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200518 /* get VDD = vdd-supply */
519 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100520 &pwr_reg);
521
522 /* check if VDD is Low Voltage */
523 if (!ret) {
524 if (regulator_get_value(pwr_reg) < 2700000) {
525 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
526 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
527 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
528 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
529 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
530 syscfg + SYSCFG_IOCTRLSETR);
531
532 if (!otp)
533 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
534 } else {
535 if (otp)
536 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
537 }
538 } else {
539 debug("VDD unknown");
540 }
541 }
542#endif
543
544 /* activate automatic I/O compensation
545 * warning: need to ensure CSI enabled and ready in clock driver
546 */
547 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
548
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200549 /* poll until ready (1s timeout) */
550 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
551 val & SYSCFG_CMPCR_READY,
552 1000000);
553 if (ret) {
554 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
555 led_error_blink(10);
556 }
557
Patrick Delaunay45459742019-02-27 17:01:24 +0100558 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
559#endif
560}
561
Patrick Delaunayd573e462019-07-30 19:16:38 +0200562#ifdef CONFIG_DM_REGULATOR
563/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
564static int dk2_i2c1_fix(void)
565{
566 ofnode node;
567 struct gpio_desc hdmi, audio;
568 int ret = 0;
569
570 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
571 if (!ofnode_valid(node)) {
572 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
573 return -ENOENT;
574 }
575
576 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
577 &hdmi, GPIOD_IS_OUT)) {
578 pr_debug("%s: could not find reset-gpios\n",
579 __func__);
580 return -ENOENT;
581 }
582
583 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
584 if (!ofnode_valid(node)) {
585 pr_debug("%s: no cs42l51@4a ?\n", __func__);
586 return -ENOENT;
587 }
588
589 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
590 &audio, GPIOD_IS_OUT)) {
591 pr_debug("%s: could not find reset-gpios\n",
592 __func__);
593 return -ENOENT;
594 }
595
596 /* before power up, insure that HDMI and AUDIO IC is under reset */
597 ret = dm_gpio_set_value(&hdmi, 1);
598 if (ret) {
599 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
600 goto error;
601 }
602 ret = dm_gpio_set_value(&audio, 1);
603 if (ret) {
604 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
605 goto error;
606 }
607
608 /* power-up audio IC */
609 regulator_autoset_by_name("v1v8_audio", NULL);
610
611 /* power-up HDMI IC */
612 regulator_autoset_by_name("v1v2_hdmi", NULL);
613 regulator_autoset_by_name("v3v3_hdmi", NULL);
614
615error:
616 return ret;
617}
618
619static bool board_is_dk2(void)
620{
Patrick Delaunay84625482020-01-13 15:17:42 +0100621 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200622 of_machine_is_compatible("st,stm32mp157c-dk2"))
623 return true;
624
625 return false;
626}
627#endif
628
Patrick Delaunay055065a2020-04-22 14:29:13 +0200629static bool board_is_ev1(void)
630{
631 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
632 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
633 of_machine_is_compatible("st,stm32mp157c-ev1") ||
634 of_machine_is_compatible("st,stm32mp157d-ev1") ||
635 of_machine_is_compatible("st,stm32mp157f-ev1")))
636 return true;
637
638 return false;
639}
640
641/* touchscreen driver: only used for pincontrol configuration */
642static const struct udevice_id goodix_ids[] = {
643 { .compatible = "goodix,gt9147", },
644 { }
645};
646
647U_BOOT_DRIVER(goodix) = {
648 .name = "goodix",
649 .id = UCLASS_NOP,
650 .of_match = goodix_ids,
651};
652
653static void board_ev1_init(void)
654{
655 struct udevice *dev;
656
657 /* configure IRQ line on EV1 for touchscreen before LCD reset */
658 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
659}
660
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100661/* board dependent setup after realloc */
662int board_init(void)
663{
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100664 struct udevice *dev;
665
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100666 /* address of boot parameters */
667 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
668
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100669 /* probe all PINCTRL for hog */
670 for (uclass_first_device(UCLASS_PINCTRL, &dev);
671 dev;
672 uclass_next_device(&dev)) {
673 pr_debug("probe pincontrol = %s\n", dev->name);
674 }
675
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100676 board_key_check();
677
Patrick Delaunay055065a2020-04-22 14:29:13 +0200678 if (board_is_ev1())
679 board_ev1_init();
680
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200681#ifdef CONFIG_DM_REGULATOR
Patrick Delaunayd573e462019-07-30 19:16:38 +0200682 if (board_is_dk2())
683 dk2_i2c1_fix();
684
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200685 regulators_enable_boot_on(_DEBUG);
686#endif
687
Patrick Delaunay45459742019-02-27 17:01:24 +0100688 sysconf_init();
689
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200690 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200691 led_default_state();
692
Patrick Delaunay0c952952020-04-22 14:29:12 +0200693 setup_led(LEDST_ON);
694
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100695 return 0;
696}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100697
698int board_late_init(void)
699{
700#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
701 const void *fdt_compat;
702 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200703 int ret;
704 u32 otp;
705 struct udevice *dev;
706 char buf[10];
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100707
708 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
709 &fdt_compat_len);
710 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay99f67432020-04-22 14:29:14 +0200711 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100712 env_set("board_name", fdt_compat);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200713 } else {
714 char dtb_name[256];
715 int buf_len = sizeof(dtb_name);
716
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100717 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200718
719 strncpy(dtb_name, fdt_compat + 3, buf_len);
720 buf_len -= strlen(fdt_compat + 3);
721 strncat(dtb_name, ".dtb", buf_len);
722 env_set("fdtfile", dtb_name);
723 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100724 }
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200725 ret = uclass_get_device_by_driver(UCLASS_MISC,
726 DM_GET_DRIVER(stm32mp_bsec),
727 &dev);
728
729 if (!ret)
730 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
731 &otp, sizeof(otp));
732 if (!ret && otp) {
733 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
734 env_set("board_id", buf);
735
736 snprintf(buf, sizeof(buf), "0x%04x",
737 ((otp >> 8) & 0xF) - 1 + 0xA);
738 env_set("board_rev", buf);
739 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100740#endif
741
Patrick Delaunay41542472019-07-30 19:16:43 +0200742#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100743 /* for DK1/DK2 boards */
744 board_check_usb_power();
Patrick Delaunay41542472019-07-30 19:16:43 +0200745#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100746
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100747 return 0;
748}
Patrice Chotard395f1292019-02-12 16:50:40 +0100749
750void board_quiesce_devices(void)
751{
752 setup_led(LEDST_OFF);
753}
Patrice Chotard87471642019-05-02 18:07:14 +0200754
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200755/* eth init function : weak called in eqos driver */
756int board_interface_eth_init(struct udevice *dev,
757 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200758{
759 u8 *syscfg;
760 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200761 bool eth_clk_sel_reg = false;
762 bool eth_ref_clk_sel_reg = false;
763
764 /* Gigabit Ethernet 125MHz clock selection. */
765 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
766
767 /* Ethernet 50Mhz RMII clock selection */
768 eth_ref_clk_sel_reg =
769 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200770
771 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
772
773 if (!syscfg)
774 return -ENODEV;
775
776 switch (interface_type) {
777 case PHY_INTERFACE_MODE_MII:
778 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
779 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
780 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
781 break;
782 case PHY_INTERFACE_MODE_GMII:
783 if (eth_clk_sel_reg)
784 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
785 SYSCFG_PMCSETR_ETH_CLK_SEL;
786 else
787 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
788 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
789 break;
790 case PHY_INTERFACE_MODE_RMII:
791 if (eth_ref_clk_sel_reg)
792 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
793 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
794 else
795 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
796 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
797 break;
798 case PHY_INTERFACE_MODE_RGMII:
799 case PHY_INTERFACE_MODE_RGMII_ID:
800 case PHY_INTERFACE_MODE_RGMII_RXID:
801 case PHY_INTERFACE_MODE_RGMII_TXID:
802 if (eth_clk_sel_reg)
803 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
804 SYSCFG_PMCSETR_ETH_CLK_SEL;
805 else
806 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
807 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
808 break;
809 default:
810 debug("%s: Do not manage %d interface\n",
811 __func__, interface_type);
812 /* Do not manage others interfaces */
813 return -EINVAL;
814 }
815
816 /* clear and set ETH configuration bits */
817 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
818 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
819 syscfg + SYSCFG_PMCCLRR);
820 writel(value, syscfg + SYSCFG_PMCSETR);
821
822 return 0;
823}
824
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200825enum env_location env_get_location(enum env_operation op, int prio)
826{
827 u32 bootmode = get_bootmode();
828
829 if (prio)
830 return ENVL_UNKNOWN;
831
832 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
833#ifdef CONFIG_ENV_IS_IN_EXT4
834 case BOOT_FLASH_SD:
835 case BOOT_FLASH_EMMC:
836 return ENVL_EXT4;
837#endif
838#ifdef CONFIG_ENV_IS_IN_UBI
839 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100840 case BOOT_FLASH_SPINAND:
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200841 return ENVL_UBI;
842#endif
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200843#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
844 case BOOT_FLASH_NOR:
845 return ENVL_SPI_FLASH;
846#endif
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200847 default:
848 return ENVL_NOWHERE;
849 }
850}
851
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200852#if defined(CONFIG_ENV_IS_IN_EXT4)
853const char *env_ext4_get_intf(void)
854{
855 u32 bootmode = get_bootmode();
856
857 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
858 case BOOT_FLASH_SD:
859 case BOOT_FLASH_EMMC:
860 return "mmc";
861 default:
862 return "";
863 }
864}
865
866const char *env_ext4_get_dev_part(void)
867{
868 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
869 u32 bootmode = get_bootmode();
870
871 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
872}
873#endif
874
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200875#if defined(CONFIG_OF_BOARD_SETUP)
876int ft_board_setup(void *blob, bd_t *bd)
877{
878#ifdef CONFIG_FDT_FIXUP_PARTITIONS
879 struct node_info nodes[] = {
880 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100881 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200882 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
883 };
884 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
885#endif
886
887 return 0;
888}
889#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200890
891static void board_copro_image_process(ulong fw_image, size_t fw_size)
892{
893 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
894
895 if (!rproc_is_initialized())
896 if (rproc_init()) {
897 printf("Remote Processor %d initialization failed\n",
898 id);
899 return;
900 }
901
902 ret = rproc_load(id, fw_image, fw_size);
903 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
904 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
905
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100906 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200907 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200908}
909
910U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);