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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef _PCMCIA_H
25#define _PCMCIA_H
26
27#include <common.h>
28#include <config.h>
29
30/*
31 * Allow configuration to select PCMCIA slot,
32 * or try to generate a useful default
33 */
34#if ( CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \
35 ((CONFIG_COMMANDS & CFG_CMD_IDE) && \
36 (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
37
38#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
39
40 /* The RPX series use SLOT_B */
41#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
42# define CONFIG_PCMCIA_SLOT_B
43#elif defined(CONFIG_ADS) /* The ADS board use SLOT_A */
44# define CONFIG_PCMCIA_SLOT_A
45#elif defined(CONFIG_FADS) /* The FADS series are a mess */
46# if defined(CONFIG_MPC860T) || defined(CONFIG_MPC860) || defined(CONFIG_MPC821)
47# define CONFIG_PCMCIA_SLOT_A
48# else
49# define CONFIG_PCMCIA_SLOT_B
50# endif
51#elif defined(CONFIG_TQM8xxL)
52# define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */
53#elif defined(CONFIG_SPD823TS) /* The SPD8xx use SLOT_B */
54# define CONFIG_PCMCIA_SLOT_B
55#elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) /* The IVM* use SLOT_A */
56# define CONFIG_PCMCIA_SLOT_A
57#elif defined(CONFIG_LWMON) /* The LWMON use SLOT_B */
58# define CONFIG_PCMCIA_SLOT_B
59#elif defined(CONFIG_ICU862) /* The ICU862 use SLOT_B */
60# define CONFIG_PCMCIA_SLOT_B
61#elif defined(CONFIG_C2MON) /* The C2MON use SLOT_B */
62# define CONFIG_PCMCIA_SLOT_B
63#elif defined(CONFIG_R360MPI) /* The R360MPI use SLOT_B */
64# define CONFIG_PCMCIA_SLOT_B
65#else
66# error "PCMCIA Slot not configured"
67#endif
68
69#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
70
71/* Make sure exactly one slot is defined - we support only one for now */
72#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
73#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
74#endif
75#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
76#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
77#endif
78
79#define PCMCIA_SOCKETS_NO 1
80#define PCMCIA_MEM_WIN_NO 4
81#define PCMCIA_IO_WIN_NO 2
82
83/* define _slot_ to be able to optimize macros */
84#ifdef CONFIG_PCMCIA_SLOT_A
85# define _slot_ 0
86# define PCMCIA_SLOT_MSG "slot A"
87# define PCMCIA_SLOT_x PCMCIA_PSLOT_A
88#else
89# define _slot_ 1
90# define PCMCIA_SLOT_MSG "slot B"
91# define PCMCIA_SLOT_x PCMCIA_PSLOT_B
92#endif
93
94/*
95 * The TQM850L hardware has two pins swapped! Grrrrgh!
96 */
97#ifdef CONFIG_TQM850L
98#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE
99#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET
100#else
101#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET
102#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE
103#endif
104
105/*
106 * This structure is used to address each window in the PCMCIA controller.
107 *
108 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
109 * after pcmcia_win_t[n]...
110 */
111
112typedef struct {
113 ulong br;
114 ulong or;
115} pcmcia_win_t;
116
117/*
118 * Definitions for PCMCIA control registers to operate in IDE mode
119 *
120 * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
121 * to be done later (depending on CPU clock)
122 */
123
124/* Window 0:
125 * Base: 0xFE100000 CS1
126 * Port Size: 2 Bytes
127 * Port Size: 16 Bit
128 * Common Memory Space
129 */
130
131#define CFG_PCMCIA_PBR0 0xFE100000
132#define CFG_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \
133 | PCMCIA_PPS_16 \
134 | PCMCIA_PRS_MEM \
135 | PCMCIA_SLOT_x \
136 | PCMCIA_PV \
137 )
138
139/* Window 1:
140 * Base: 0xFE100080 CS1
141 * Port Size: 8 Bytes
142 * Port Size: 8 Bit
143 * Common Memory Space
144 */
145
146#define CFG_PCMCIA_PBR1 0xFE100080
147#define CFG_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \
148 | PCMCIA_PPS_8 \
149 | PCMCIA_PRS_MEM \
150 | PCMCIA_SLOT_x \
151 | PCMCIA_PV \
152 )
153
154/* Window 2:
155 * Base: 0xFE100100 CS2
156 * Port Size: 8 Bytes
157 * Port Size: 8 Bit
158 * Common Memory Space
159 */
160
161#define CFG_PCMCIA_PBR2 0xFE100100
162#define CFG_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \
163 | PCMCIA_PPS_8 \
164 | PCMCIA_PRS_MEM \
165 | PCMCIA_SLOT_x \
166 | PCMCIA_PV \
167 )
168
169/* Window 3:
170 * not used
171 */
172#define CFG_PCMCIA_PBR3 0
173#define CFG_PCMCIA_POR3 0
174
175/* Window 4:
176 * Base: 0xFE100C00 CS1
177 * Port Size: 2 Bytes
178 * Port Size: 16 Bit
179 * Common Memory Space
180 */
181
182#define CFG_PCMCIA_PBR4 0xFE100C00
183#define CFG_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \
184 | PCMCIA_PPS_16 \
185 | PCMCIA_PRS_MEM \
186 | PCMCIA_SLOT_x \
187 | PCMCIA_PV \
188 )
189
190/* Window 5:
191 * Base: 0xFE100C80 CS1
192 * Port Size: 8 Bytes
193 * Port Size: 8 Bit
194 * Common Memory Space
195 */
196
197#define CFG_PCMCIA_PBR5 0xFE100C80
198#define CFG_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \
199 | PCMCIA_PPS_8 \
200 | PCMCIA_PRS_MEM \
201 | PCMCIA_SLOT_x \
202 | PCMCIA_PV \
203 )
204
205/* Window 6:
206 * Base: 0xFE100D00 CS2
207 * Port Size: 8 Bytes
208 * Port Size: 8 Bit
209 * Common Memory Space
210 */
211
212#define CFG_PCMCIA_PBR6 0xFE100D00
213#define CFG_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \
214 | PCMCIA_PPS_8 \
215 | PCMCIA_PRS_MEM \
216 | PCMCIA_SLOT_x \
217 | PCMCIA_PV \
218 )
219
220/* Window 7:
221 * not used
222 */
223#define CFG_PCMCIA_PBR7 0
224#define CFG_PCMCIA_POR7 0
225
226/**********************************************************************/
227
228/*
229 * CIS Tupel codes
230 */
231#define CISTPL_NULL 0x00
232#define CISTPL_DEVICE 0x01
233#define CISTPL_LONGLINK_CB 0x02
234#define CISTPL_INDIRECT 0x03
235#define CISTPL_CONFIG_CB 0x04
236#define CISTPL_CFTABLE_ENTRY_CB 0x05
237#define CISTPL_LONGLINK_MFC 0x06
238#define CISTPL_BAR 0x07
239#define CISTPL_PWR_MGMNT 0x08
240#define CISTPL_EXTDEVICE 0x09
241#define CISTPL_CHECKSUM 0x10
242#define CISTPL_LONGLINK_A 0x11
243#define CISTPL_LONGLINK_C 0x12
244#define CISTPL_LINKTARGET 0x13
245#define CISTPL_NO_LINK 0x14
246#define CISTPL_VERS_1 0x15
247#define CISTPL_ALTSTR 0x16
248#define CISTPL_DEVICE_A 0x17
249#define CISTPL_JEDEC_C 0x18
250#define CISTPL_JEDEC_A 0x19
251#define CISTPL_CONFIG 0x1a
252#define CISTPL_CFTABLE_ENTRY 0x1b
253#define CISTPL_DEVICE_OC 0x1c
254#define CISTPL_DEVICE_OA 0x1d
255#define CISTPL_DEVICE_GEO 0x1e
256#define CISTPL_DEVICE_GEO_A 0x1f
257#define CISTPL_MANFID 0x20
258#define CISTPL_FUNCID 0x21
259#define CISTPL_FUNCE 0x22
260#define CISTPL_SWIL 0x23
261#define CISTPL_END 0xff
262
263/*
264 * CIS Function ID codes
265 */
266#define CISTPL_FUNCID_MULTI 0x00
267#define CISTPL_FUNCID_MEMORY 0x01
268#define CISTPL_FUNCID_SERIAL 0x02
269#define CISTPL_FUNCID_PARALLEL 0x03
270#define CISTPL_FUNCID_FIXED 0x04
271#define CISTPL_FUNCID_VIDEO 0x05
272#define CISTPL_FUNCID_NETWORK 0x06
273#define CISTPL_FUNCID_AIMS 0x07
274#define CISTPL_FUNCID_SCSI 0x08
275
276/*
277 * Fixed Disk FUNCE codes
278 */
279#define CISTPL_IDE_INTERFACE 0x01
280
281#define CISTPL_FUNCE_IDE_IFACE 0x01
282#define CISTPL_FUNCE_IDE_MASTER 0x02
283#define CISTPL_FUNCE_IDE_SLAVE 0x03
284
285/* First feature byte */
286#define CISTPL_IDE_SILICON 0x04
287#define CISTPL_IDE_UNIQUE 0x08
288#define CISTPL_IDE_DUAL 0x10
289
290/* Second feature byte */
291#define CISTPL_IDE_HAS_SLEEP 0x01
292#define CISTPL_IDE_HAS_STANDBY 0x02
293#define CISTPL_IDE_HAS_IDLE 0x04
294#define CISTPL_IDE_LOW_POWER 0x08
295#define CISTPL_IDE_REG_INHIBIT 0x10
296#define CISTPL_IDE_HAS_INDEX 0x20
297#define CISTPL_IDE_IOIS16 0x40
298
299#endif /* CFG_CMD_PCMCIA || CFG_CMD_IDE && (CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT) */
300
301#endif /* _PCMCIA_H */