blob: 7a1d9d9ccdaa0f761aea28ac7391a559677dffef [file] [log] [blame]
Markus Klotzbuecher3e326ec2006-05-22 16:33:54 +02001/*
2 * URB OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * usb-ohci.h
8 */
9
10/* functions for doing board specific setup/cleanup */
11extern int usb_board_init(void);
12extern int usb_board_stop(void);
13
14static int cc_to_error[16] = {
15
16/* mapping of the OHCI CC status to error codes */
17 /* No Error */ 0,
18 /* CRC Error */ USB_ST_CRC_ERR,
19 /* Bit Stuff */ USB_ST_BIT_ERR,
20 /* Data Togg */ USB_ST_CRC_ERR,
21 /* Stall */ USB_ST_STALLED,
22 /* DevNotResp */ -1,
23 /* PIDCheck */ USB_ST_BIT_ERR,
24 /* UnExpPID */ USB_ST_BIT_ERR,
25 /* DataOver */ USB_ST_BUF_ERR,
26 /* DataUnder */ USB_ST_BUF_ERR,
27 /* reservd */ -1,
28 /* reservd */ -1,
29 /* BufferOver */ USB_ST_BUF_ERR,
30 /* BuffUnder */ USB_ST_BUF_ERR,
31 /* Not Access */ -1,
32 /* Not Access */ -1
33};
34
35/* ED States */
36
37#define ED_NEW 0x00
38#define ED_UNLINK 0x01
39#define ED_OPER 0x02
40#define ED_DEL 0x04
41#define ED_URB_DEL 0x08
42
43/* usb_ohci_ed */
44struct ed {
45 __u32 hwINFO;
46 __u32 hwTailP;
47 __u32 hwHeadP;
48 __u32 hwNextED;
49
50 struct ed *ed_prev;
51 __u8 int_period;
52 __u8 int_branch;
53 __u8 int_load;
54 __u8 int_interval;
55 __u8 state;
56 __u8 type;
57 __u16 last_iso;
58 struct ed *ed_rm_list;
59
60 struct usb_device *usb_dev;
61 __u32 unused[3];
62} __attribute((aligned(16)));
63typedef struct ed ed_t;
64
65
66/* TD info field */
67#define TD_CC 0xf0000000
68#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
69#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
70#define TD_EC 0x0C000000
71#define TD_T 0x03000000
72#define TD_T_DATA0 0x02000000
73#define TD_T_DATA1 0x03000000
74#define TD_T_TOGGLE 0x00000000
75#define TD_R 0x00040000
76#define TD_DI 0x00E00000
77#define TD_DI_SET(X) (((X) & 0x07)<< 21)
78#define TD_DP 0x00180000
79#define TD_DP_SETUP 0x00000000
80#define TD_DP_IN 0x00100000
81#define TD_DP_OUT 0x00080000
82
83#define TD_ISO 0x00010000
84#define TD_DEL 0x00020000
85
86/* CC Codes */
87#define TD_CC_NOERROR 0x00
88#define TD_CC_CRC 0x01
89#define TD_CC_BITSTUFFING 0x02
90#define TD_CC_DATATOGGLEM 0x03
91#define TD_CC_STALL 0x04
92#define TD_DEVNOTRESP 0x05
93#define TD_PIDCHECKFAIL 0x06
94#define TD_UNEXPECTEDPID 0x07
95#define TD_DATAOVERRUN 0x08
96#define TD_DATAUNDERRUN 0x09
97#define TD_BUFFEROVERRUN 0x0C
98#define TD_BUFFERUNDERRUN 0x0D
99#define TD_NOTACCESSED 0x0F
100
101
102#define MAXPSW 1
103
104struct td {
105 __u32 hwINFO;
106 __u32 hwCBP; /* Current Buffer Pointer */
107 __u32 hwNextTD; /* Next TD Pointer */
108 __u32 hwBE; /* Memory Buffer End Pointer */
109
110 __u16 hwPSW[MAXPSW];
111 __u8 unused;
112 __u8 index;
113 struct ed *ed;
114 struct td *next_dl_td;
115 struct usb_device *usb_dev;
116 int transfer_len;
117 __u32 data;
118
119 __u32 unused2[2];
120} __attribute((aligned(32)));
121typedef struct td td_t;
122
123#define OHCI_ED_SKIP (1 << 14)
124
125/*
126 * The HCCA (Host Controller Communications Area) is a 256 byte
127 * structure defined in the OHCI spec. that the host controller is
128 * told the base address of. It must be 256-byte aligned.
129 */
130
131#define NUM_INTS 32 /* part of the OHCI standard */
132struct ohci_hcca {
133 __u32 int_table[NUM_INTS]; /* Interrupt ED table */
134 __u16 frame_no; /* current frame number */
135 __u16 pad1; /* set to 0 on each frame_no change */
136 __u32 done_head; /* info returned for an interrupt */
137 u8 reserved_for_hc[116];
138} __attribute((aligned(256)));
139
140
141/*
142 * Maximum number of root hub ports.
143 */
144#define MAX_ROOT_PORTS 3 /* maximum OHCI root hub ports */
145
146/*
147 * This is the structure of the OHCI controller's memory mapped I/O
148 * region. This is Memory Mapped I/O. You must use the readl() and
149 * writel() macros defined in asm/io.h to access these!!
150 */
151struct ohci_regs {
152 /* control and status registers */
153 __u32 revision;
154 __u32 control;
155 __u32 cmdstatus;
156 __u32 intrstatus;
157 __u32 intrenable;
158 __u32 intrdisable;
159 /* memory pointers */
160 __u32 hcca;
161 __u32 ed_periodcurrent;
162 __u32 ed_controlhead;
163 __u32 ed_controlcurrent;
164 __u32 ed_bulkhead;
165 __u32 ed_bulkcurrent;
166 __u32 donehead;
167 /* frame counters */
168 __u32 fminterval;
169 __u32 fmremaining;
170 __u32 fmnumber;
171 __u32 periodicstart;
172 __u32 lsthresh;
173 /* Root hub ports */
174 struct ohci_roothub_regs {
175 __u32 a;
176 __u32 b;
177 __u32 status;
178 __u32 portstatus[MAX_ROOT_PORTS];
179 } roothub;
180} __attribute((aligned(32)));
181
182
183/* OHCI CONTROL AND STATUS REGISTER MASKS */
184
185/*
186 * HcControl (control) register masks
187 */
188#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */
189#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */
190#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */
191#define OHCI_CTRL_CLE (1 << 4) /* control list enable */
192#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */
193#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */
194#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
195#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
196#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
197
198/* pre-shifted values for HCFS */
199# define OHCI_USB_RESET (0 << 6)
200# define OHCI_USB_RESUME (1 << 6)
201# define OHCI_USB_OPER (2 << 6)
202# define OHCI_USB_SUSPEND (3 << 6)
203
204/*
205 * HcCommandStatus (cmdstatus) register masks
206 */
207#define OHCI_HCR (1 << 0) /* host controller reset */
208#define OHCI_CLF (1 << 1) /* control list filled */
209#define OHCI_BLF (1 << 2) /* bulk list filled */
210#define OHCI_OCR (1 << 3) /* ownership change request */
211#define OHCI_SOC (3 << 16) /* scheduling overrun count */
212
213/*
214 * masks used with interrupt registers:
215 * HcInterruptStatus (intrstatus)
216 * HcInterruptEnable (intrenable)
217 * HcInterruptDisable (intrdisable)
218 */
219#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
220#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */
221#define OHCI_INTR_SF (1 << 2) /* start frame */
222#define OHCI_INTR_RD (1 << 3) /* resume detect */
223#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
224#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
225#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
226#define OHCI_INTR_OC (1 << 30) /* ownership change */
227#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
228
229
230/* Virtual Root HUB */
231struct virt_root_hub {
232 int devnum; /* Address of Root Hub endpoint */
233 void *dev; /* was urb */
234 void *int_addr;
235 int send;
236 int interval;
237};
238
239/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
240
241/* destination of request */
242#define RH_INTERFACE 0x01
243#define RH_ENDPOINT 0x02
244#define RH_OTHER 0x03
245
246#define RH_CLASS 0x20
247#define RH_VENDOR 0x40
248
249/* Requests: bRequest << 8 | bmRequestType */
250#define RH_GET_STATUS 0x0080
251#define RH_CLEAR_FEATURE 0x0100
252#define RH_SET_FEATURE 0x0300
253#define RH_SET_ADDRESS 0x0500
254#define RH_GET_DESCRIPTOR 0x0680
255#define RH_SET_DESCRIPTOR 0x0700
256#define RH_GET_CONFIGURATION 0x0880
257#define RH_SET_CONFIGURATION 0x0900
258#define RH_GET_STATE 0x0280
259#define RH_GET_INTERFACE 0x0A80
260#define RH_SET_INTERFACE 0x0B00
261#define RH_SYNC_FRAME 0x0C80
262/* Our Vendor Specific Request */
263#define RH_SET_EP 0x2000
264
265
266/* Hub port features */
267#define RH_PORT_CONNECTION 0x00
268#define RH_PORT_ENABLE 0x01
269#define RH_PORT_SUSPEND 0x02
270#define RH_PORT_OVER_CURRENT 0x03
271#define RH_PORT_RESET 0x04
272#define RH_PORT_POWER 0x08
273#define RH_PORT_LOW_SPEED 0x09
274
275#define RH_C_PORT_CONNECTION 0x10
276#define RH_C_PORT_ENABLE 0x11
277#define RH_C_PORT_SUSPEND 0x12
278#define RH_C_PORT_OVER_CURRENT 0x13
279#define RH_C_PORT_RESET 0x14
280
281/* Hub features */
282#define RH_C_HUB_LOCAL_POWER 0x00
283#define RH_C_HUB_OVER_CURRENT 0x01
284
285#define RH_DEVICE_REMOTE_WAKEUP 0x00
286#define RH_ENDPOINT_STALL 0x01
287
288#define RH_ACK 0x01
289#define RH_REQ_ERR -1
290#define RH_NACK 0x00
291
292
293/* OHCI ROOT HUB REGISTER MASKS */
294
295/* roothub.portstatus [i] bits */
296#define RH_PS_CCS 0x00000001 /* current connect status */
297#define RH_PS_PES 0x00000002 /* port enable status*/
298#define RH_PS_PSS 0x00000004 /* port suspend status */
299#define RH_PS_POCI 0x00000008 /* port over current indicator */
300#define RH_PS_PRS 0x00000010 /* port reset status */
301#define RH_PS_PPS 0x00000100 /* port power status */
302#define RH_PS_LSDA 0x00000200 /* low speed device attached */
303#define RH_PS_CSC 0x00010000 /* connect status change */
304#define RH_PS_PESC 0x00020000 /* port enable status change */
305#define RH_PS_PSSC 0x00040000 /* port suspend status change */
306#define RH_PS_OCIC 0x00080000 /* over current indicator change */
307#define RH_PS_PRSC 0x00100000 /* port reset status change */
308
309/* roothub.status bits */
310#define RH_HS_LPS 0x00000001 /* local power status */
311#define RH_HS_OCI 0x00000002 /* over current indicator */
312#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
313#define RH_HS_LPSC 0x00010000 /* local power status change */
314#define RH_HS_OCIC 0x00020000 /* over current indicator change */
315#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
316
317/* roothub.b masks */
318#define RH_B_DR 0x0000ffff /* device removable flags */
319#define RH_B_PPCM 0xffff0000 /* port power control mask */
320
321/* roothub.a masks */
322#define RH_A_NDP (0xff << 0) /* number of downstream ports */
323#define RH_A_PSM (1 << 8) /* power switching mode */
324#define RH_A_NPS (1 << 9) /* no power switching */
325#define RH_A_DT (1 << 10) /* device type (mbz) */
326#define RH_A_OCPM (1 << 11) /* over current protection mode */
327#define RH_A_NOCP (1 << 12) /* no over current protection */
328#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
329
330/* urb */
331#define N_URB_TD 48
332typedef struct
333{
334 ed_t *ed;
335 __u16 length; /* number of tds associated with this request */
336 __u16 td_cnt; /* number of tds already serviced */
337 int state;
338 unsigned long pipe;
339 int actual_length;
340 td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
341} urb_priv_t;
342#define URB_DEL 1
343
344/*
345 * This is the full ohci controller description
346 *
347 * Note how the "proper" USB information is just
348 * a subset of what the full implementation needs. (Linus)
349 */
350
351
352typedef struct ohci {
353 struct ohci_hcca *hcca; /* hcca */
354 /*dma_addr_t hcca_dma;*/
355
356 int irq;
357 int disabled; /* e.g. got a UE, we're hung */
358 int sleeping;
359 unsigned long flags; /* for HC bugs */
360
361 struct ohci_regs *regs; /* OHCI controller's memory */
362
363 ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
364 ed_t *ed_bulktail; /* last endpoint of bulk list */
365 ed_t *ed_controltail; /* last endpoint of control list */
366 int intrstatus;
367 __u32 hc_control; /* copy of the hc control reg */
368 struct usb_device *dev[32];
369 struct virt_root_hub rh;
370
371 const char *slot_name;
372} ohci_t;
373
374#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
375
376struct ohci_device {
377 ed_t ed[NUM_EDS];
378 int ed_cnt;
379};
380
381/* hcd */
382/* endpoint */
383static int ep_link(ohci_t * ohci, ed_t * ed);
384static int ep_unlink(ohci_t * ohci, ed_t * ed);
385static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe);
386
387/*-------------------------------------------------------------------------*/
388
389/* we need more TDs than EDs */
390#define NUM_TD 64
391
392/* +1 so we can align the storage */
393td_t gtd[NUM_TD+1];
394/* pointers to aligned storage */
395td_t *ptd;
396
397/* TDs ... */
398static inline struct td *
399td_alloc (struct usb_device *usb_dev)
400{
401 int i;
402 struct td *td;
403
404 td = NULL;
405 for (i = 0; i < NUM_TD; i++)
406 {
407 if (ptd[i].usb_dev == NULL)
408 {
409 td = &ptd[i];
410 td->usb_dev = usb_dev;
411 break;
412 }
413 }
414
415 return td;
416}
417
418static inline void
419ed_free (struct ed *ed)
420{
421 ed->usb_dev = NULL;
422}