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Tero Kristo9d233b42019-10-24 15:00:46 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver
4 *
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 */
9
10#include <common.h>
11#include <dm.h>
12#include <errno.h>
13#include <asm/io.h>
14#include <i2c.h>
15#include <k3-avs.h>
Simon Glass336d4612020-02-03 07:36:16 -070016#include <dm/device_compat.h>
Tero Kristo9d233b42019-10-24 15:00:46 +053017#include <power/regulator.h>
18
19#define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i))
20#define AM6_VTM_OPPVID_VD(i) (priv->base + 0x104 + 0x20 * (i))
21
22#define AM6_VTM_AVS0_SUPPORTED BIT(12)
23
24#define AM6_VTM_OPP_SHIFT(opp) (8 * (opp))
25#define AM6_VTM_OPP_MASK 0xff
26
27#define VD_FLAG_INIT_DONE BIT(0)
28
29struct k3_avs_privdata {
30 void *base;
31 struct vd_config *vd_config;
32};
33
34struct opp {
35 u32 freq;
36 u32 volt;
37};
38
39struct vd_data {
40 int id;
41 u8 opp;
42 u8 flags;
43 int dev_id;
44 int clk_id;
45 struct opp opps[NUM_OPPS];
46 struct udevice *supply;
47};
48
49struct vd_config {
50 struct vd_data *vds;
51 u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp);
52};
53
54static struct k3_avs_privdata *k3_avs_priv;
55
56/**
57 * am6_efuse_voltage: read efuse voltage from VTM
58 * @priv: driver private data
59 * @idx: VD to read efuse for
60 * @opp: opp id to read
61 *
62 * Reads efuse value for the specified OPP, and converts the register
63 * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage
64 * should be used.
65 *
66 * Efuse val to volt conversion logic:
67 *
68 * val > 171 volt increments in 20mV steps with base 171 => 1.66V
69 * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V
70 * val between 15 to 115 increments in 5mV steps with base 15 => .6V
71 * val between 1 to 15 increments in 20mv steps with base 0 => .3V
72 * val 0 is invalid
73 */
74static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp)
75{
76 u32 val = readl(AM6_VTM_OPPVID_VD(idx));
77
78 val >>= AM6_VTM_OPP_SHIFT(opp);
79 val &= AM6_VTM_OPP_MASK;
80
81 if (!val)
82 return 0;
83
84 if (val > 171)
85 return 1660000 + 20000 * (val - 171);
86
87 if (val > 115)
88 return 1100000 + 10000 * (val - 115);
89
90 if (val > 15)
91 return 600000 + 5000 * (val - 15);
92
93 return 300000 + 20000 * val;
94}
95
96static int k3_avs_program_voltage(struct k3_avs_privdata *priv,
97 struct vd_data *vd,
98 int opp_id)
99{
100 u32 volt = vd->opps[opp_id].volt;
101 struct vd_data *vd2;
102
103 if (!vd->supply)
104 return -ENODEV;
105
106 vd->opp = opp_id;
107 vd->flags |= VD_FLAG_INIT_DONE;
108
109 /* Take care of ganged rails and pick the Max amongst them*/
110 for (vd2 = priv->vd_config->vds; vd2->id >= 0; vd2++) {
111 if (vd == vd2)
112 continue;
113
114 if (vd2->supply != vd->supply)
115 continue;
116
117 if (vd2->opps[vd2->opp].volt > volt)
118 volt = vd2->opps[vd2->opp].volt;
119
120 vd2->flags |= VD_FLAG_INIT_DONE;
121 }
122
123 return regulator_set_value(vd->supply, volt);
124}
125
126static struct vd_data *get_vd(struct k3_avs_privdata *priv, int idx)
127{
128 struct vd_data *vd;
129
130 for (vd = priv->vd_config->vds; vd->id >= 0 && vd->id != idx; vd++)
131 ;
132
133 if (vd->id < 0)
134 return NULL;
135
136 return vd;
137}
138
139/**
140 * k3_avs_set_opp: Sets the voltage for an arbitrary VD rail
141 * @dev: AVS device
142 * @vdd_id: voltage domain ID
143 * @opp_id: OPP ID
144 *
145 * Programs the desired OPP value for the defined voltage rail. This
146 * should be called from board files if reconfiguration is desired.
147 * Returns 0 on success, negative error value on failure.
148 */
149int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id)
150{
151 struct k3_avs_privdata *priv = dev_get_priv(dev);
152 struct vd_data *vd;
153
154 vd = get_vd(priv, vdd_id);
155 if (!vd)
156 return -EINVAL;
157
158 return k3_avs_program_voltage(priv, vd, opp_id);
159}
160
161static int match_opp(struct vd_data *vd, u32 freq)
162{
163 struct opp *opp;
164 int opp_id;
165
166 for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) {
167 opp = &vd->opps[opp_id];
168 if (opp->freq == freq)
169 return opp_id;
170 }
171
172 printf("No matching OPP found for freq %d.\n", freq);
173
174 return -EINVAL;
175}
176
177/**
178 * k3_avs_notify_freq: Notify clock rate change towards AVS subsystem
179 * @dev_id: Device ID for the clock to be changed
180 * @clk_id: Clock ID for the clock to be changed
181 * @freq: New frequency for clock
182 *
183 * Checks if the provided clock is the MPU clock or not, if not, return
184 * immediately. If MPU clock is provided, maps the provided MPU frequency
185 * towards an MPU OPP, and programs the voltage to the regulator. Return 0
186 * on success, negative error value on failure.
187 */
188int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq)
189{
190 int opp_id;
191 struct k3_avs_privdata *priv = k3_avs_priv;
192 struct vd_data *vd;
193
194 for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
195 if (vd->dev_id != dev_id || vd->clk_id != clk_id)
196 continue;
197
198 opp_id = match_opp(vd, freq);
199 if (opp_id < 0)
200 return opp_id;
201
202 vd->opp = opp_id;
203 return k3_avs_program_voltage(priv, vd, opp_id);
204 }
205
206 return -EINVAL;
207}
208
209static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv)
210{
211 struct vd_config *conf;
212 int ret;
213 char pname[20];
214 struct vd_data *vd;
215
216 conf = (void *)dev_get_driver_data(dev);
217
218 priv->vd_config = conf;
219
220 for (vd = conf->vds; vd->id >= 0; vd++) {
221 sprintf(pname, "vdd-supply-%d", vd->id);
222 ret = device_get_supply_regulator(dev, pname, &vd->supply);
223 if (ret)
224 dev_warn(dev, "supply not found for VD%d.\n", vd->id);
225
226 sprintf(pname, "ti,default-opp-%d", vd->id);
227 ret = dev_read_u32_default(dev, pname, -1);
228 if (ret != -1)
229 vd->opp = ret;
230 }
231
232 return 0;
233}
234
235/**
236 * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data
237 *
238 * Parses all VDs on a device calculating the AVS class-0 voltages for them,
239 * and updates the vd_data based on this. The vd_data itself shall be used
240 * to program the required OPPs later on. Returns 0 on success, negative
241 * error value on failure.
242 */
243static int k3_avs_probe(struct udevice *dev)
244{
245 int opp_id;
246 u32 volt;
247 struct opp *opp;
248 struct k3_avs_privdata *priv;
249 struct vd_data *vd;
250 int ret;
251
252 priv = dev_get_priv(dev);
253
254 k3_avs_priv = priv;
255
256 ret = k3_avs_configure(dev, priv);
257 if (ret)
258 return ret;
259
260 priv->base = dev_read_addr_ptr(dev);
261 if (!priv->base)
262 return -ENODEV;
263
264 for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
265 if (!(readl(AM6_VTM_DEVINFO(vd->id)) &
266 AM6_VTM_AVS0_SUPPORTED)) {
267 dev_warn(dev, "AVS-class 0 not supported for VD%d\n",
268 vd->id);
269 continue;
270 }
271
272 for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) {
273 opp = &vd->opps[opp_id];
274
275 if (!opp->freq)
276 continue;
277
278 volt = priv->vd_config->efuse_xlate(priv, vd->id,
279 opp_id);
280 if (volt)
281 opp->volt = volt;
282 }
283 }
284
285 for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
286 if (vd->flags & VD_FLAG_INIT_DONE)
287 continue;
288
289 k3_avs_program_voltage(priv, vd, vd->opp);
290 }
291
292 return 0;
293}
294
295static struct vd_data am654_vd_data[] = {
296 {
297 .id = AM6_VDD_CORE,
298 .dev_id = 82, /* AM6_DEV_CBASS0 */
299 .clk_id = 0, /* main sysclk0 */
300 .opp = AM6_OPP_NOM,
301 .opps = {
302 [AM6_OPP_NOM] = {
303 .volt = 1000000,
304 .freq = 250000000, /* CBASS0 */
305 },
306 },
307 },
308 {
309 .id = AM6_VDD_MPU0,
310 .dev_id = 202, /* AM6_DEV_COMPUTE_CLUSTER_A53_0 */
311 .clk_id = 0, /* ARM clock */
312 .opp = AM6_OPP_NOM,
313 .opps = {
314 [AM6_OPP_NOM] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200315 .volt = 1100000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530316 .freq = 800000000,
317 },
318 [AM6_OPP_OD] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200319 .volt = 1200000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530320 .freq = 1000000000,
321 },
322 [AM6_OPP_TURBO] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200323 .volt = 1240000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530324 .freq = 1100000000,
325 },
326 },
327 },
328 {
329 .id = AM6_VDD_MPU1,
330 .opp = AM6_OPP_NOM,
331 .dev_id = 204, /* AM6_DEV_COMPUTE_CLUSTER_A53_2 */
332 .clk_id = 0, /* ARM clock */
333 .opps = {
334 [AM6_OPP_NOM] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200335 .volt = 1100000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530336 .freq = 800000000,
337 },
338 [AM6_OPP_OD] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200339 .volt = 1200000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530340 .freq = 1000000000,
341 },
342 [AM6_OPP_TURBO] = {
Tero Kristo3e7b0aa2020-02-14 09:05:10 +0200343 .volt = 1240000,
Tero Kristo9d233b42019-10-24 15:00:46 +0530344 .freq = 1100000000,
345 },
346 },
347 },
348 { .id = -1 },
349};
350
Keerthy9a03e502019-10-24 15:00:49 +0530351static struct vd_data j721e_vd_data[] = {
352 {
353 .id = J721E_VDD_MPU,
354 .opp = AM6_OPP_NOM,
355 .dev_id = 202, /* J721E_DEV_A72SS0_CORE0 */
356 .clk_id = 2, /* ARM clock */
357 .opps = {
358 [AM6_OPP_NOM] = {
359 .volt = 880000, /* TBD in DM */
360 .freq = 2000000000,
361 },
362 },
363 },
364 { .id = -1 },
365};
366
367static struct vd_config j721e_vd_config = {
368 .efuse_xlate = am6_efuse_xlate,
369 .vds = j721e_vd_data,
370};
371
Tero Kristo9d233b42019-10-24 15:00:46 +0530372static struct vd_config am654_vd_config = {
373 .efuse_xlate = am6_efuse_xlate,
374 .vds = am654_vd_data,
375};
376
377static const struct udevice_id k3_avs_ids[] = {
378 { .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config },
Keerthy9a03e502019-10-24 15:00:49 +0530379 { .compatible = "ti,j721e-avs", .data = (ulong)&j721e_vd_config },
Tero Kristo9d233b42019-10-24 15:00:46 +0530380 {}
381};
382
383U_BOOT_DRIVER(k3_avs) = {
384 .name = "k3_avs",
385 .of_match = k3_avs_ids,
386 .id = UCLASS_MISC,
387 .probe = k3_avs_probe,
388 .priv_auto_alloc_size = sizeof(struct k3_avs_privdata),
389};