Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010,2011 |
| 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
| 5 | * (C) Copyright 2008 |
| 6 | * Texas Instruments |
| 7 | * |
| 8 | * Richard Woodruff <r-woodruff2@ti.com> |
| 9 | * Syed Moahmmed Khasim <khasim@ti.com> |
| 10 | * |
| 11 | * (C) Copyright 2002 |
| 12 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 13 | * Marius Groeger <mgroeger@sysgo.de> |
| 14 | * Alex Zuepke <azu@sysgo.de> |
| 15 | * |
| 16 | * (C) Copyright 2002 |
| 17 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
| 18 | * |
| 19 | * See file CREDITS for list of people who contributed to this |
| 20 | * project. |
| 21 | * |
| 22 | * This program is free software; you can redistribute it and/or |
| 23 | * modify it under the terms of the GNU General Public License as |
| 24 | * published by the Free Software Foundation; either version 2 of |
| 25 | * the License, or (at your option) any later version. |
| 26 | * |
| 27 | * This program is distributed in the hope that it will be useful, |
| 28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 30 | * GNU General Public License for more details. |
| 31 | * |
| 32 | * You should have received a copy of the GNU General Public License |
| 33 | * along with this program; if not, write to the Free Software |
| 34 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 35 | * MA 02111-1307 USA |
| 36 | */ |
| 37 | |
| 38 | #include <common.h> |
| 39 | #include <asm/io.h> |
Tom Warren | 150c249 | 2012-09-19 15:50:56 -0700 | [diff] [blame] | 40 | #include <asm/arch/tegra.h> |
| 41 | #include <asm/arch-tegra/timer.h> |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 42 | |
| 43 | DECLARE_GLOBAL_DATA_PTR; |
| 44 | |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 45 | /* counter runs at 1MHz */ |
Simon Glass | 39d3416 | 2011-08-30 06:23:12 +0000 | [diff] [blame] | 46 | #define TIMER_CLK 1000000 |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 47 | #define TIMER_LOAD_VAL 0xffffffff |
| 48 | |
| 49 | /* timer without interrupts */ |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 50 | ulong get_timer(ulong base) |
| 51 | { |
| 52 | return get_timer_masked() - base; |
| 53 | } |
| 54 | |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 55 | /* delay x useconds */ |
| 56 | void __udelay(unsigned long usec) |
| 57 | { |
| 58 | long tmo = usec * (TIMER_CLK / 1000) / 1000; |
Simon Glass | 39d3416 | 2011-08-30 06:23:12 +0000 | [diff] [blame] | 59 | unsigned long now, last = timer_get_us(); |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 60 | |
| 61 | while (tmo > 0) { |
Simon Glass | 39d3416 | 2011-08-30 06:23:12 +0000 | [diff] [blame] | 62 | now = timer_get_us(); |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 63 | if (last > now) /* count up timer overflow */ |
| 64 | tmo -= TIMER_LOAD_VAL - last + now; |
| 65 | else |
| 66 | tmo -= now - last; |
| 67 | last = now; |
| 68 | } |
| 69 | } |
| 70 | |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 71 | ulong get_timer_masked(void) |
| 72 | { |
| 73 | ulong now; |
| 74 | |
| 75 | /* current tick value */ |
Simon Glass | 39d3416 | 2011-08-30 06:23:12 +0000 | [diff] [blame] | 76 | now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ); |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 77 | |
Simon Glass | 582601d | 2012-12-13 20:48:35 +0000 | [diff] [blame] | 78 | if (now >= gd->arch.lastinc) /* normal mode (non roll) */ |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 79 | /* move stamp forward with absolute diff ticks */ |
Simon Glass | 582601d | 2012-12-13 20:48:35 +0000 | [diff] [blame] | 80 | gd->arch.tbl += (now - gd->arch.lastinc); |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 81 | else /* we have rollover of incrementer */ |
Simon Glass | 66ee692 | 2012-12-13 20:48:34 +0000 | [diff] [blame] | 82 | gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ)) |
Simon Glass | 582601d | 2012-12-13 20:48:35 +0000 | [diff] [blame] | 83 | - gd->arch.lastinc) + now; |
| 84 | gd->arch.lastinc = now; |
Simon Glass | 66ee692 | 2012-12-13 20:48:34 +0000 | [diff] [blame] | 85 | return gd->arch.tbl; |
Tom Warren | 3f82b1d | 2011-01-27 10:58:05 +0000 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | /* |
| 89 | * This function is derived from PowerPC code (read timebase as long long). |
| 90 | * On ARM it just returns the timer value. |
| 91 | */ |
| 92 | unsigned long long get_ticks(void) |
| 93 | { |
| 94 | return get_timer(0); |
| 95 | } |
| 96 | |
| 97 | /* |
| 98 | * This function is derived from PowerPC code (timebase clock frequency). |
| 99 | * On ARM it returns the number of timer ticks per second. |
| 100 | */ |
| 101 | ulong get_tbclk(void) |
| 102 | { |
| 103 | return CONFIG_SYS_HZ; |
| 104 | } |
Simon Glass | 39d3416 | 2011-08-30 06:23:12 +0000 | [diff] [blame] | 105 | |
| 106 | unsigned long timer_get_us(void) |
| 107 | { |
| 108 | struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE; |
| 109 | |
| 110 | return readl(&timer_base->cntr_1us); |
| 111 | } |