Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com> |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 4 | */ |
| 5 | #include <common.h> |
| 6 | #include <asm/arch/i2c.h> |
| 7 | #include <asm/io.h> |
| 8 | #include <dm.h> |
| 9 | #include <i2c.h> |
| 10 | |
Beniamino Galvani | 8c47ab6 | 2017-11-26 17:40:55 +0100 | [diff] [blame] | 11 | #define I2C_TIMEOUT_MS 100 |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 12 | |
| 13 | /* Control register fields */ |
| 14 | #define REG_CTRL_START BIT(0) |
| 15 | #define REG_CTRL_ACK_IGNORE BIT(1) |
| 16 | #define REG_CTRL_STATUS BIT(2) |
| 17 | #define REG_CTRL_ERROR BIT(3) |
| 18 | #define REG_CTRL_CLKDIV_SHIFT 12 |
| 19 | #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) |
| 20 | #define REG_CTRL_CLKDIVEXT_SHIFT 28 |
| 21 | #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) |
| 22 | |
| 23 | enum { |
| 24 | TOKEN_END = 0, |
| 25 | TOKEN_START, |
| 26 | TOKEN_SLAVE_ADDR_WRITE, |
| 27 | TOKEN_SLAVE_ADDR_READ, |
| 28 | TOKEN_DATA, |
| 29 | TOKEN_DATA_LAST, |
| 30 | TOKEN_STOP, |
| 31 | }; |
| 32 | |
| 33 | struct i2c_regs { |
| 34 | u32 ctrl; |
| 35 | u32 slave_addr; |
| 36 | u32 tok_list0; |
| 37 | u32 tok_list1; |
| 38 | u32 tok_wdata0; |
| 39 | u32 tok_wdata1; |
| 40 | u32 tok_rdata0; |
| 41 | u32 tok_rdata1; |
| 42 | }; |
| 43 | |
| 44 | struct meson_i2c { |
| 45 | struct i2c_regs *regs; |
Beniamino Galvani | 50a6909 | 2017-11-26 17:40:57 +0100 | [diff] [blame] | 46 | struct i2c_msg *msg; /* Current I2C message */ |
| 47 | bool last; /* Whether the message is the last */ |
| 48 | uint count; /* Number of bytes in the current transfer */ |
| 49 | uint pos; /* Position of current transfer in message */ |
| 50 | u32 tokens[2]; /* Sequence of tokens to be written */ |
| 51 | uint num_tokens; /* Number of tokens to be written */ |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | static void meson_i2c_reset_tokens(struct meson_i2c *i2c) |
| 55 | { |
| 56 | i2c->tokens[0] = 0; |
| 57 | i2c->tokens[1] = 0; |
| 58 | i2c->num_tokens = 0; |
| 59 | } |
| 60 | |
| 61 | static void meson_i2c_add_token(struct meson_i2c *i2c, int token) |
| 62 | { |
| 63 | if (i2c->num_tokens < 8) |
| 64 | i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); |
| 65 | else |
| 66 | i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4); |
| 67 | |
| 68 | i2c->num_tokens++; |
| 69 | } |
| 70 | |
Beniamino Galvani | 50a6909 | 2017-11-26 17:40:57 +0100 | [diff] [blame] | 71 | /* |
| 72 | * Retrieve data for the current transfer (which can be at most 8 |
| 73 | * bytes) from the device internal buffer. |
| 74 | */ |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 75 | static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len) |
| 76 | { |
| 77 | u32 rdata0, rdata1; |
| 78 | int i; |
| 79 | |
| 80 | rdata0 = readl(&i2c->regs->tok_rdata0); |
| 81 | rdata1 = readl(&i2c->regs->tok_rdata1); |
| 82 | |
| 83 | debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len); |
| 84 | |
| 85 | for (i = 0; i < min(4, len); i++) |
| 86 | *buf++ = (rdata0 >> i * 8) & 0xff; |
| 87 | |
| 88 | for (i = 4; i < min(8, len); i++) |
| 89 | *buf++ = (rdata1 >> (i - 4) * 8) & 0xff; |
| 90 | } |
| 91 | |
Beniamino Galvani | 50a6909 | 2017-11-26 17:40:57 +0100 | [diff] [blame] | 92 | /* |
| 93 | * Write data for the current transfer (which can be at most 8 bytes) |
| 94 | * to the device internal buffer. |
| 95 | */ |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 96 | static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len) |
| 97 | { |
| 98 | u32 wdata0 = 0, wdata1 = 0; |
| 99 | int i; |
| 100 | |
| 101 | for (i = 0; i < min(4, len); i++) |
| 102 | wdata0 |= *buf++ << (i * 8); |
| 103 | |
| 104 | for (i = 4; i < min(8, len); i++) |
| 105 | wdata1 |= *buf++ << ((i - 4) * 8); |
| 106 | |
| 107 | writel(wdata0, &i2c->regs->tok_wdata0); |
| 108 | writel(wdata1, &i2c->regs->tok_wdata1); |
| 109 | |
| 110 | debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len); |
| 111 | } |
| 112 | |
Beniamino Galvani | 50a6909 | 2017-11-26 17:40:57 +0100 | [diff] [blame] | 113 | /* |
| 114 | * Prepare the next transfer: pick the next 8 bytes in the remaining |
| 115 | * part of message and write tokens and data (if needed) to the |
| 116 | * device. |
| 117 | */ |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 118 | static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) |
| 119 | { |
| 120 | bool write = !(i2c->msg->flags & I2C_M_RD); |
| 121 | int i; |
| 122 | |
| 123 | i2c->count = min(i2c->msg->len - i2c->pos, 8u); |
| 124 | |
| 125 | for (i = 0; i + 1 < i2c->count; i++) |
| 126 | meson_i2c_add_token(i2c, TOKEN_DATA); |
| 127 | |
| 128 | if (i2c->count) { |
| 129 | if (write || i2c->pos + i2c->count < i2c->msg->len) |
| 130 | meson_i2c_add_token(i2c, TOKEN_DATA); |
| 131 | else |
| 132 | meson_i2c_add_token(i2c, TOKEN_DATA_LAST); |
| 133 | } |
| 134 | |
| 135 | if (write) |
| 136 | meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); |
| 137 | |
| 138 | if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) |
| 139 | meson_i2c_add_token(i2c, TOKEN_STOP); |
| 140 | |
| 141 | writel(i2c->tokens[0], &i2c->regs->tok_list0); |
| 142 | writel(i2c->tokens[1], &i2c->regs->tok_list1); |
| 143 | } |
| 144 | |
| 145 | static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg) |
| 146 | { |
| 147 | int token; |
| 148 | |
| 149 | token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : |
| 150 | TOKEN_SLAVE_ADDR_WRITE; |
| 151 | |
| 152 | writel(msg->addr << 1, &i2c->regs->slave_addr); |
| 153 | meson_i2c_add_token(i2c, TOKEN_START); |
| 154 | meson_i2c_add_token(i2c, token); |
| 155 | } |
| 156 | |
| 157 | static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, |
| 158 | int last) |
| 159 | { |
| 160 | ulong start; |
| 161 | |
| 162 | debug("meson i2c: %s addr %u len %u\n", |
| 163 | (msg->flags & I2C_M_RD) ? "read" : "write", |
| 164 | msg->addr, msg->len); |
| 165 | |
| 166 | i2c->msg = msg; |
| 167 | i2c->last = last; |
| 168 | i2c->pos = 0; |
| 169 | i2c->count = 0; |
| 170 | |
| 171 | meson_i2c_reset_tokens(i2c); |
| 172 | meson_i2c_do_start(i2c, msg); |
| 173 | |
| 174 | do { |
| 175 | meson_i2c_prepare_xfer(i2c); |
| 176 | |
| 177 | /* start the transfer */ |
| 178 | setbits_le32(&i2c->regs->ctrl, REG_CTRL_START); |
| 179 | start = get_timer(0); |
| 180 | while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) { |
| 181 | if (get_timer(start) > I2C_TIMEOUT_MS) { |
| 182 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); |
| 183 | debug("meson i2c: timeout\n"); |
| 184 | return -ETIMEDOUT; |
| 185 | } |
| 186 | udelay(1); |
| 187 | } |
| 188 | meson_i2c_reset_tokens(i2c); |
| 189 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); |
| 190 | |
| 191 | if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) { |
| 192 | debug("meson i2c: error\n"); |
Beniamino Galvani | 989bb92 | 2017-11-26 17:40:56 +0100 | [diff] [blame] | 193 | return -EREMOTEIO; |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 194 | } |
| 195 | |
| 196 | if ((msg->flags & I2C_M_RD) && i2c->count) { |
| 197 | meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, |
| 198 | i2c->count); |
| 199 | } |
| 200 | i2c->pos += i2c->count; |
| 201 | } while (i2c->pos < msg->len); |
| 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
| 206 | static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, |
| 207 | int nmsgs) |
| 208 | { |
| 209 | struct meson_i2c *i2c = dev_get_priv(bus); |
| 210 | int i, ret = 0; |
| 211 | |
| 212 | for (i = 0; i < nmsgs; i++) { |
| 213 | ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1); |
| 214 | if (ret) |
Beniamino Galvani | 989bb92 | 2017-11-26 17:40:56 +0100 | [diff] [blame] | 215 | return ret; |
Beniamino Galvani | f8d9ca1 | 2017-10-29 10:09:00 +0100 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
| 222 | { |
| 223 | struct meson_i2c *i2c = dev_get_priv(bus); |
| 224 | unsigned int clk_rate = MESON_I2C_CLK_RATE; |
| 225 | unsigned int div; |
| 226 | |
| 227 | div = DIV_ROUND_UP(clk_rate, speed * 4); |
| 228 | |
| 229 | /* clock divider has 12 bits */ |
| 230 | if (div >= (1 << 12)) { |
| 231 | debug("meson i2c: requested bus frequency too low\n"); |
| 232 | div = (1 << 12) - 1; |
| 233 | } |
| 234 | |
| 235 | clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK, |
| 236 | (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); |
| 237 | |
| 238 | clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK, |
| 239 | (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); |
| 240 | |
| 241 | debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div); |
| 242 | |
| 243 | return 0; |
| 244 | } |
| 245 | |
| 246 | static int meson_i2c_probe(struct udevice *bus) |
| 247 | { |
| 248 | struct meson_i2c *i2c = dev_get_priv(bus); |
| 249 | |
| 250 | i2c->regs = dev_read_addr_ptr(bus); |
| 251 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); |
| 252 | |
| 253 | return 0; |
| 254 | } |
| 255 | |
| 256 | static const struct dm_i2c_ops meson_i2c_ops = { |
| 257 | .xfer = meson_i2c_xfer, |
| 258 | .set_bus_speed = meson_i2c_set_bus_speed, |
| 259 | }; |
| 260 | |
| 261 | static const struct udevice_id meson_i2c_ids[] = { |
| 262 | { .compatible = "amlogic,meson6-i2c" }, |
| 263 | { .compatible = "amlogic,meson-gx-i2c" }, |
| 264 | { .compatible = "amlogic,meson-gxbb-i2c" }, |
| 265 | { } |
| 266 | }; |
| 267 | |
| 268 | U_BOOT_DRIVER(i2c_meson) = { |
| 269 | .name = "i2c_meson", |
| 270 | .id = UCLASS_I2C, |
| 271 | .of_match = meson_i2c_ids, |
| 272 | .probe = meson_i2c_probe, |
| 273 | .priv_auto_alloc_size = sizeof(struct meson_i2c), |
| 274 | .ops = &meson_i2c_ops, |
| 275 | }; |