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wdenk0db5bca2003-03-31 17:27:09 +00001/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
wdenk8bde7f72003-06-27 21:31:46 +000020 * Foundation,
wdenk0db5bca2003-03-31 17:27:09 +000021 */
22
23/*
24 * File: cpu.c
wdenk8bde7f72003-06-27 21:31:46 +000025 *
26 * Discription: Some cpu specific function for watchdog,
wdenk0db5bca2003-03-31 17:27:09 +000027 * cpu version test, clock setting ...
wdenk8bde7f72003-06-27 21:31:46 +000028 *
wdenk0db5bca2003-03-31 17:27:09 +000029 */
30
31
32#include <common.h>
33#include <watchdog.h>
34#include <command.h>
35#include <mpc5xx.h>
36
Wolfgang Denkd87080b2006-03-31 18:32:53 +020037DECLARE_GLOBAL_DATA_PTR;
wdenk0db5bca2003-03-31 17:27:09 +000038
39#if (defined(CONFIG_MPC555))
40# define ID_STR "MPC555/556"
41
42/*
43 * Check version of cpu with Processor Version Register (PVR)
44 */
45static int check_cpu_version (long clock, uint pvr, uint immr)
46{
47 char buf[32];
48 /* The highest 16 bits should be 0x0002 for a MPC555/556 */
49 if ((pvr >> 16) == 0x0002) {
50 printf (" " ID_STR " Version %x", (pvr >> 16));
51 printf (" at %s MHz:", strmhz (buf, clock));
52 } else {
53 printf ("Not supported cpu version");
54 return -1;
55 }
56 return 0;
57}
58#endif /* CONFIG_MPC555 */
59
60
61/*
62 * Check version of mpc5xx
63 */
64int checkcpu (void)
65{
wdenk0db5bca2003-03-31 17:27:09 +000066 ulong clock = gd->cpu_clk;
67 uint immr = get_immr (0); /* Return full IMMR contents */
68 uint pvr = get_pvr (); /* Retrieve PVR register */
69
70 puts ("CPU: ");
71
72 return check_cpu_version (clock, pvr, immr);
73}
74
75/*
wdenk8bde7f72003-06-27 21:31:46 +000076 * Called by macro WATCHDOG_RESET
wdenk0db5bca2003-03-31 17:27:09 +000077 */
78#if defined(CONFIG_WATCHDOG)
79void watchdog_reset (void)
80{
81 int re_enable = disable_interrupts ();
82
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083 reset_5xx_watchdog ((immap_t *) CONFIG_SYS_IMMR);
wdenk0db5bca2003-03-31 17:27:09 +000084 if (re_enable)
85 enable_interrupts ();
86}
87
88/*
89 * Will clear software reset
90 */
91void reset_5xx_watchdog (volatile immap_t * immr)
92{
93 /* Use the MPC5xx Internal Watchdog */
94 immr->im_siu_conf.sc_swsr = 0x556c; /* Prevent SW time-out */
wdenk8bde7f72003-06-27 21:31:46 +000095 immr->im_siu_conf.sc_swsr = 0xaa39;
wdenk0db5bca2003-03-31 17:27:09 +000096}
97
98#endif /* CONFIG_WATCHDOG */
99
100
101/*
102 * Get timebase clock frequency
103 */
104unsigned long get_tbclk (void)
105{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106 volatile immap_t *immr = (volatile immap_t *) CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +0000107 ulong oscclk, factor;
108
109 if (immr->im_clkrst.car_sccr & SCCR_TBS) {
110 return (gd->cpu_clk / 16);
111 }
112
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113 factor = (((CONFIG_SYS_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
wdenk0db5bca2003-03-31 17:27:09 +0000114
115 oscclk = gd->cpu_clk / factor;
116
117 if ((immr->im_clkrst.car_sccr & SCCR_RTSEL) == 0 || factor > 2) {
118 return (oscclk / 4);
119 }
120 return (oscclk / 16);
121}
122
wdenkb6e4c402004-01-02 16:05:07 +0000123void dcache_enable (void)
124{
125 return;
126}
127
128void dcache_disable (void)
129{
130 return;
131}
132
133int dcache_status (void)
134{
135 return 0; /* always off */
136}
wdenk0db5bca2003-03-31 17:27:09 +0000137
138/*
wdenk8bde7f72003-06-27 21:31:46 +0000139 * Reset board
wdenk0db5bca2003-03-31 17:27:09 +0000140 */
141int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
142{
wdenkb6e4c402004-01-02 16:05:07 +0000143#if defined(CONFIG_PATI)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144 volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS;
wdenkb6e4c402004-01-02 16:05:07 +0000145 *addr = 1;
146#else
wdenk0db5bca2003-03-31 17:27:09 +0000147 ulong addr;
wdenk8bde7f72003-06-27 21:31:46 +0000148
wdenk0db5bca2003-03-31 17:27:09 +0000149 /* Interrupts off, enable reset */
wdenk8bde7f72003-06-27 21:31:46 +0000150 __asm__ volatile (" mtspr 81, %r0 \n\t"
wdenkcceb8712003-06-23 18:12:28 +0000151 " mfmsr %r3 \n\t"
152 " rlwinm %r31,%r3,0,25,23\n\t"
153 " mtmsr %r31 \n\t");
wdenk8bde7f72003-06-27 21:31:46 +0000154 /*
155 * Trying to execute the next instruction at a non-existing address
156 * should cause a machine check, resulting in reset
157 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#ifdef CONFIG_SYS_RESET_ADDRESS
159 addr = CONFIG_SYS_RESET_ADDRESS;
wdenk0db5bca2003-03-31 17:27:09 +0000160#else
wdenk8bde7f72003-06-27 21:31:46 +0000161 /*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162 * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address, CONFIG_SYS_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address
163 * known to be invalid on your system and assign it to CONFIG_SYS_RESET_ADDRESS.
wdenk8bde7f72003-06-27 21:31:46 +0000164 * "(ulong)-1" used to be a good choice for many systems...
165 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166 addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
wdenk0db5bca2003-03-31 17:27:09 +0000167#endif
168 ((void (*) (void)) addr) ();
wdenkb6e4c402004-01-02 16:05:07 +0000169#endif /* #if defined(CONFIG_PATI) */
wdenk0db5bca2003-03-31 17:27:09 +0000170 return 1;
171}