| Tom Rini | af27382 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 1 | menuconfig PCI |
| 2 | bool "PCI support" |
| Bin Meng | 6bf89de | 2017-07-30 06:23:09 -0700 | [diff] [blame] | 3 | default y if PPC |
| Tom Rini | af27382 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 4 | help |
| 5 | Enable support for PCI (Peripheral Interconnect Bus), a type of bus |
| 6 | used on some devices to allow the CPU to communicate with its |
| 7 | peripherals. |
| 8 | |
| 9 | if PCI |
| Simon Glass | ff3e077 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 10 | |
| 11 | config DM_PCI |
| Marcel Ziswiler | e090fdb | 2016-12-19 15:38:05 +0100 | [diff] [blame] | 12 | bool "Enable driver model for PCI" |
| Simon Glass | ff3e077 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 13 | depends on DM |
| 14 | help |
| 15 | Use driver model for PCI. Driver model is the new method for |
| 16 | orgnising devices in U-Boot. For PCI, driver model keeps track of |
| 17 | available PCI devices, allows scanning of PCI buses and provides |
| 18 | device configuration support. |
| 19 | |
| Simon Glass | 3ba5f74 | 2015-11-26 19:51:30 -0700 | [diff] [blame] | 20 | config DM_PCI_COMPAT |
| 21 | bool "Enable compatible functions for PCI" |
| 22 | depends on DM_PCI |
| 23 | help |
| 24 | Enable compatibility functions for PCI so that old code can be used |
| 25 | with CONFIG_DM_PCI enabled. This should be used as an interim |
| 26 | measure when porting a board to use driver model for PCI. Once the |
| 27 | board is fully supported, this option should be disabled. |
| 28 | |
| Bin Meng | c476215 | 2016-10-16 23:35:18 -0700 | [diff] [blame] | 29 | config PCI_PNP |
| 30 | bool "Enable Plug & Play support for PCI" |
| 31 | depends on PCI || DM_PCI |
| 32 | default y |
| 33 | help |
| 34 | Enable PCI memory and I/O space resource allocation and assignment. |
| 35 | |
| Tuomas Tynkkynen | 3675cb0 | 2017-09-19 23:18:06 +0300 | [diff] [blame] | 36 | config PCIE_ECAM_GENERIC |
| 37 | bool "Generic ECAM-based PCI host controller support" |
| 38 | default n |
| 39 | depends on DM_PCI |
| 40 | help |
| 41 | Say Y here if you want to enable support for generic ECAM-based |
| 42 | PCIe host controllers, such as the one emulated by QEMU. |
| 43 | |
| Shadi Ammouri | 182ba1a | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 44 | config PCIE_DW_MVEBU |
| 45 | bool "Enable Armada-8K PCIe driver (DesignWare core)" |
| Shadi Ammouri | 182ba1a | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 46 | depends on DM_PCI |
| 47 | depends on ARMADA_8K |
| 48 | help |
| 49 | Say Y here if you want to enable PCIe controller support on |
| 50 | Armada-8K SoCs. The PCIe controller on Armada-8K is based on |
| 51 | DesignWare hardware. |
| 52 | |
| Marek Vasut | 5f14f7d | 2018-01-18 14:35:35 +0100 | [diff] [blame] | 53 | config PCI_RCAR_GEN2 |
| 54 | bool "Renesas RCar Gen2 PCIe driver" |
| 55 | depends on DM_PCI |
| 56 | depends on RCAR_32 |
| 57 | help |
| 58 | Say Y here if you want to enable PCIe controller support on |
| 59 | Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is |
| 60 | also used to access EHCI USB controller on the SoC. |
| 61 | |
| Simon Glass | 537849a | 2015-03-05 12:25:27 -0700 | [diff] [blame] | 62 | config PCI_SANDBOX |
| 63 | bool "Sandbox PCI support" |
| 64 | depends on SANDBOX && DM_PCI |
| 65 | help |
| 66 | Support PCI on sandbox, as an emulated bus. This permits testing of |
| 67 | PCI feature such as bus scanning, device configuration and device |
| 68 | access. The available (emulated) devices are defined statically in |
| 69 | the device tree but the normal PCI scan technique is used to find |
| 70 | then. |
| 71 | |
| Simon Glass | fde7e18 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 72 | config PCI_TEGRA |
| 73 | bool "Tegra PCI support" |
| 74 | depends on TEGRA |
| Stephen Warren | bbc5b36 | 2016-08-05 16:10:34 -0600 | [diff] [blame] | 75 | depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186) |
| Simon Glass | fde7e18 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 76 | help |
| 77 | Enable support for the PCIe controller found on some generations of |
| 78 | Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has |
| 79 | 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports |
| 80 | with a total of 5 lanes. Some boards require this for Ethernet |
| 81 | support to work (e.g. beaver, jetson-tk1). |
| 82 | |
| Paul Burton | a29e45a | 2016-09-08 07:47:31 +0100 | [diff] [blame] | 83 | config PCI_XILINX |
| 84 | bool "Xilinx AXI Bridge for PCI Express" |
| 85 | depends on DM_PCI |
| 86 | help |
| 87 | Enable support for the Xilinx AXI bridge for PCI express, an IP block |
| 88 | which can be used on some generations of Xilinx FPGAs. |
| 89 | |
| Minghuan Lian | 80afc63 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 90 | config PCIE_LAYERSCAPE |
| 91 | bool "Layerscape PCIe support" |
| 92 | depends on DM_PCI |
| 93 | help |
| 94 | Support Layerscape PCIe. The Layerscape SoC may have one or several |
| 95 | PCIe controllers. The PCIe may works in RC or EP mode according to |
| 96 | RCW[HOST_AGT_PEX] setting. |
| 97 | |
| Tom Rini | af27382 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 98 | endif |