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Daniel Hellstrom6ed8a432008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010012 */
13
14#ifndef __CONFIG_H__
15#define __CONFIG_H__
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
21
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010022#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
23
24#define CONFIG_LEON_RAM_SRAM 1
25#define CONFIG_LEON_RAM_SDRAM 2
26#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
27
28/* Select Memory to run from
29 *
30 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
31 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
32 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
33 *
34 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
35 * it doesn't fit into the 4Mb SRAM.
36 *
37 * SRAM is default since it will work for all systems, however will not
38 * be able to boot linux.
39 */
40#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
41
42/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020043#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010044
45/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010047
48/*
49 * Serial console configuration
50 */
51#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010053
54/* Partitions */
55#define CONFIG_DOS_PARTITION
56#define CONFIG_MAC_PARTITION
57#define CONFIG_ISO_PARTITION
58
59/*
60 * Supported commands
61 */
62#include <config_cmd_default.h>
63
64#define CONFIG_CMD_REGINFO
65#define CONFIG_CMD_AMBAPP
66#define CONFIG_CMD_PING
67#define CONFIG_CMD_DIAG
68#define CONFIG_CMD_IRQ
69
70/*
71 * Autobooting
72 */
73#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
74
75#define CONFIG_PREBOOT "echo;" \
76 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
77 "echo"
78
79#undef CONFIG_BOOTARGS
80
81#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
82 "netdev=eth0\0" \
83 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
84 "nfsroot=${serverip}:${rootpath}\0" \
85 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
86 "addip=setenv bootargs ${bootargs} " \
87 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
88 ":${hostname}:${netdev}:off panic=1\0" \
89 "flash_nfs=run nfsargs addip;" \
90 "bootm ${kernel_addr}\0" \
91 "flash_self=run ramargs addip;" \
92 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000093 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010094 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
95
96#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
97#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
98 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
99 "scratch=40200000\0" \
100 ""
101#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
102#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
103 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
104 "scratch=60800000\0" \
105 ""
106#else
107/* More than 4Mb is assumed when running from SDRAM */
108#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
109 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
110 "scratch=40800000\0" \
111 ""
112#endif
113
114#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
115
116#define CONFIG_NETMASK 255.255.255.0
117#define CONFIG_GATEWAYIP 192.168.0.1
118#define CONFIG_SERVERIP 192.168.0.20
119#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000120#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100121#define CONFIG_HOSTNAME ax2000
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000122#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100123
124#define CONFIG_BOOTCOMMAND "run flash_self"
125
126/* Memory MAP
127 *
128 * Flash:
129 * |--------------------------------|
130 * | 0x00000000 Text & Data & BSS | *
131 * | for Monitor | *
132 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
133 * | UNUSED / Growth | * 256kb
134 * |--------------------------------|
135 * | 0x00050000 Base custom area | *
136 * | kernel / FS | *
137 * | | * Rest of Flash
138 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
139 * | END-0x00008000 Environment | * 32kb
140 * |--------------------------------|
141 *
142 *
143 *
144 * Main Memory (4Mb SRAM or XMb SDRAM):
145 * |--------------------------------|
146 * | UNUSED / scratch area |
147 * | |
148 * | |
149 * | |
150 * | |
151 * |--------------------------------|
152 * | Monitor .Text / .DATA / .BSS | * 256kb
153 * | Relocated! | *
154 * |--------------------------------|
155 * | Monitor Malloc | * 128kb (contains relocated environment)
156 * |--------------------------------|
157 * | Monitor/kernel STACK | * 64kb
158 * |--------------------------------|
159 * | Page Table for MMU systems | * 2k
160 * |--------------------------------|
161 * | PROM Code accessed from Linux | * 6kb-128b
162 * |--------------------------------|
163 * | Global data (avail from kernel)| * 128b
164 * |--------------------------------|
165 *
166 */
167
168/*
169 * Flash configuration (8,16 or 32 MB)
170 * TEXT base always at 0xFFF00000
171 * ENV_ADDR always at 0xFFF40000
172 * FLASH_BASE at 0xFC000000 for 64 MB
173 * 0xFE000000 for 32 MB
174 * 0xFF000000 for 16 MB
175 * 0xFF800000 for 8 MB
176 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177/*#define CONFIG_SYS_NO_FLASH 1*/
178#define CONFIG_SYS_FLASH_BASE 0x00000000
179#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100180
181#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
183#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100184
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
186#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
187#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
188#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
189#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100190
191/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200193#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100195/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100197/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100199
200/*
201 * Environment settings
202 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200203/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200204#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200205/* CONFIG_ENV_ADDR need to be at sector boundary */
206#define CONFIG_ENV_SIZE 0x8000
207#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100209#define CONFIG_ENV_OVERWRITE 1
210
211/*
212 * Memory map
213 *
214 * Always 4Mb SRAM available
215 * SDRAM module may be available on 0x60000000, SDRAM
216 * is configured as if a 128Mb SDRAM module is available.
217 */
218
219#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100221#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100223#endif
224
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200225#define CONFIG_SYS_SDRAM_SIZE 0x08000000
226#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100227
228/* 4Mb SRAM available */
229#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_SRAM_BASE 0x40000000
231#define CONFIG_SYS_SRAM_SIZE 0x400000
232#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100233#endif
234
235/* Select RAM used to run U-BOOT from... */
236#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
238#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
239#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100240#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200241#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
242#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
243#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100244#endif
245
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200246#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100247
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200248#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200249#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100250
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
252#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100253
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200254#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
256# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100257#endif
258
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
260#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
261#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100262
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200263#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
264#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100265
266/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200267#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
268#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100269
270/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200271#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100272
273/*
274 * Ethernet configuration uses on board SMC91C111
275 */
Ben Warren7194ab82009-10-04 22:37:03 -0700276#define CONFIG_SMC91111 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100277#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
278#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
279#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
280/*#define CONFIG_SHOW_ACTIVITY*/
281#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
282
283#define CONFIG_ETHADDR 00:00:7a:cc:00:13
284#define CONFIG_PHY_ADDR 0x00
285
286/*
287 * Miscellaneous configurable options
288 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100290#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100292#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100294#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
296#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
297#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100298
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200299#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
300#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100301
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200302#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100303
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100304/*
305 * Various low-level settings
306 */
307
308/*-----------------------------------------------------------------------
309 * USB stuff
310 *-----------------------------------------------------------------------
311 */
312#define CONFIG_USB_CLOCK 0x0001BBBB
313#define CONFIG_USB_CONFIG 0x00005000
314
315/***** Gaisler GRLIB IP-Cores Config ********/
316
317/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200318/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100319
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100321
322/* See, GRLIB Docs (grip.pdf) on how to set up
323 * These the memory controller registers.
324 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200325#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100326#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200327#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100328#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200329#define CONFIG_SYS_GRLIB_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100330#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200331#define CONFIG_SYS_GRLIB_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100332
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200333#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100334#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200335#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100336#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200337#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100338#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200339#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100340
341/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200342#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100343
344/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200345#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
346#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100347
348/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200349#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100350 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
351
352/* Identification string */
353#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
354
355/* default kernel command line */
356#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
357
358#endif /* __CONFIG_H */