blob: e593f22b1069b4464c76f0c3d0ed76dfaab168ab [file] [log] [blame]
Kumar Galaa09b9b62010-12-30 12:09:53 -06001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#include <common.h>
21#include <config.h>
22#include <asm/fsl_law.h>
23#include <asm/fsl_serdes.h>
Liu Gang5ffa88e2012-03-08 00:33:17 +000024#include <asm/fsl_srio.h>
25
26#define SRIO_PORT_ACCEPT_ALL 0x10000001
27#define SRIO_IB_ATMU_AR 0x80f55000
Kumar Galaa09b9b62010-12-30 12:09:53 -060028
29#if defined(CONFIG_FSL_CORENET)
30 #define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
31 #define _DEVDISR_SRIO2 FSL_CORENET_DEVDISR_SRIO2
32 #define _DEVDISR_RMU FSL_CORENET_DEVDISR_RMU
33 #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
34#elif defined(CONFIG_MPC85xx)
35 #define _DEVDISR_SRIO1 MPC85xx_DEVDISR_SRIO
36 #define _DEVDISR_SRIO2 MPC85xx_DEVDISR_SRIO
37 #define _DEVDISR_RMU MPC85xx_DEVDISR_RMSG
38 #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
39#elif defined(CONFIG_MPC86xx)
40 #define _DEVDISR_SRIO1 MPC86xx_DEVDISR_SRIO
41 #define _DEVDISR_SRIO2 MPC86xx_DEVDISR_SRIO
42 #define _DEVDISR_RMU MPC86xx_DEVDISR_RMSG
43 #define CONFIG_SYS_MPC8xxx_GUTS_ADDR \
44 (&((immap_t *)CONFIG_SYS_IMMR)->im_gur)
45#else
46#error "No defines for DEVDISR_SRIO"
47#endif
48
49void srio_init(void)
50{
51 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR;
52 int srio1_used = 0, srio2_used = 0;
53
54 if (is_serdes_configured(SRIO1)) {
55 set_next_law(CONFIG_SYS_SRIO1_MEM_PHYS,
56 law_size_bits(CONFIG_SYS_SRIO1_MEM_SIZE),
57 LAW_TRGT_IF_RIO_1);
58 srio1_used = 1;
59 printf("SRIO1: enabled\n");
60 } else {
61 printf("SRIO1: disabled\n");
62 }
63
64#ifdef CONFIG_SRIO2
65 if (is_serdes_configured(SRIO2)) {
66 set_next_law(CONFIG_SYS_SRIO2_MEM_PHYS,
67 law_size_bits(CONFIG_SYS_SRIO2_MEM_SIZE),
68 LAW_TRGT_IF_RIO_2);
69 srio2_used = 1;
70 printf("SRIO2: enabled\n");
71 } else {
72 printf("SRIO2: disabled\n");
73 }
74#endif
75
76#ifdef CONFIG_FSL_CORENET
77 /* On FSL_CORENET devices we can disable individual ports */
78 if (!srio1_used)
79 setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO1);
80 if (!srio2_used)
81 setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO2);
82#endif
83
84 /* neither port is used - disable everything */
85 if (!srio1_used && !srio2_used) {
86 setbits_be32(&gur->devdisr, _DEVDISR_SRIO1);
87 setbits_be32(&gur->devdisr, _DEVDISR_SRIO2);
88 setbits_be32(&gur->devdisr, _DEVDISR_RMU);
89 }
90}
Liu Gang5ffa88e2012-03-08 00:33:17 +000091
92#ifdef CONFIG_SRIOBOOT_MASTER
93void srio_boot_master(void)
94{
95 struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
96
97 /* set port accept-all */
98 out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
99 SRIO_PORT_ACCEPT_ALL);
100
101 debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
102 CONFIG_SRIOBOOT_MASTER_PORT);
Liu Gang3f1af812012-03-08 00:33:19 +0000103 /* configure inbound window for slave's u-boot image */
104 debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
Liu Gang5ffa88e2012-03-08 00:33:17 +0000105 "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
106 (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
107 (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
108 CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
109 out_be32((void *)&srio->atmu
110 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
111 CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
112 out_be32((void *)&srio->atmu
113 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
114 CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
115 out_be32((void *)&srio->atmu
116 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
117 SRIO_IB_ATMU_AR
118 | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
119
Liu Gang3f1af812012-03-08 00:33:19 +0000120 /* configure inbound window for slave's u-boot image */
121 debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
Liu Gang5ffa88e2012-03-08 00:33:17 +0000122 "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
123 (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
124 (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
125 CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
126 out_be32((void *)&srio->atmu
127 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
128 CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
129 out_be32((void *)&srio->atmu
130 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
131 CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
132 out_be32((void *)&srio->atmu
133 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
134 SRIO_IB_ATMU_AR
135 | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
Liu Gang3f1af812012-03-08 00:33:19 +0000136
137 /* configure inbound window for slave's ucode */
138 debug("SRIOBOOT - MASTER: Inbound window for slave's ucode; "
139 "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
140 (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS,
141 (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS,
142 CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE);
143 out_be32((void *)&srio->atmu
144 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwtar,
145 CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS >> 12);
146 out_be32((void *)&srio->atmu
147 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwbar,
148 CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS >> 12);
149 out_be32((void *)&srio->atmu
150 .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwar,
151 SRIO_IB_ATMU_AR
152 | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE));
Liu Gang5ffa88e2012-03-08 00:33:17 +0000153}
154#endif